Command: cat decode-dimms-output.txtMemory Serial Presence Detect DecoderBy Philip Edelbrock, Christian Zuckschwerdt, Burkart Lingner,Jean Delvare and othersVersion 2.10.2Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0050Guessing DIMM is in bank 1---=== SPD EEPROM Information ===---EEPROM Checksum of bytes 0-62 OK (0xC9)# of bytes written to SDRAM EEPROM 128Total number of bytes in EEPROM 256Fundamental Memory type SDR SDRAMSPD Revision 18---=== Memory Characteristics ===---Size 64 MBtCL-tRCD-tRP-tRAS 3-3-3-6Number of Row Address Bits 12Number of Col Address Bits 9Number of Module Rows 1Data Width 64Module Interface Signal Levels LVTTLModule Configuration Type No ParityRefresh Type Self RefreshingRefresh Rate Normal (15.625 us)Primary SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 widthPrimary SDRAM Component Widths 8Error Checking SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 widthError Checking SDRAM Component Widths Undefined!Min Clock Delay for Back to Back Random Access 1Burst lengths supported 1, 2, 4, 8, PageNumber of Device Banks 4Supported CAS Latencies 2, 3Supported CS Latencies 0Supported WE Latencies 0Cycle Time (CAS 3) 8 nsAccess Time (CAS 3) 6 nsCycle Time (CAS 2) 10 nsAccess Time (CAS 2) 6 nsSDRAM Module Attributes (None Reported)SDRAM Device Attributes (General) Supports Auto-Precharge Supports Precharge All Supports Write1/Read Burst Lower VCC Tolerance: 10% Upper VCC Tolerance: 10%Minimum Row Precharge Time 20 nsRow Active to Row Active Min 20 nsRAS to CAS Delay 20 nsMin RAS Pulse Width 48 nsRow Densities 64 MByteCommand and Address Signal Setup Time 2 nsCommand and Address Signal Hold Time 1 nsData Signal Setup Time 2 nsData Signal Hold Time 1 ns---=== Manufacturing Information ===---Manufacturer ToshibaManufacturing Location Code 0x03Part Number THMY6480F1BEG-80 Manufacturing Date 2062-W33Assembly Serial Number 0x120E3D02---=== Intel Specification ===---Frequency 100MHz or 133MHzDetails for 100MHz Support Intel Concurrent Auto-precharge CAS Latency = 2 CAS Latency = 3 Junction Temp B (90 degrees C) CLK 2 Connected CLK 0 Connected Single-sided DIMMDecoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0051Guessing DIMM is in bank 2---=== SPD EEPROM Information ===---EEPROM Checksum of bytes 0-62 OK (0xE0)# of bytes written to SDRAM EEPROM 128Total number of bytes in EEPROM 256Fundamental Memory type SDR SDRAMSPD Revision 2---=== Memory Characteristics ===---Size 128 MBtCL-tRCD-tRP-tRAS 3-3-3-6Number of Row Address Bits 12Number of Col Address Bits 10Number of Module Rows 1Data Width 64Module Interface Signal Levels LVTTLModule Configuration Type No ParityRefresh Type Self RefreshingRefresh Rate Normal (15.625 us)Primary SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 widthPrimary SDRAM Component Widths 8Error Checking SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 widthError Checking SDRAM Component Widths Undefined!Min Clock Delay for Back to Back Random Access 1Burst lengths supported 1, 2, 4, 8, PageNumber of Device Banks 4Supported CAS Latencies 2, 3Supported CS Latencies 0Supported WE Latencies 0Cycle Time (CAS 3) 7.5 nsAccess Time (CAS 3) 5.4 nsCycle Time (CAS 2) 10 nsAccess Time (CAS 2) 6 nsSDRAM Module Attributes (None Reported)SDRAM Device Attributes (General) Supports Auto-Precharge Supports Precharge All Supports Write1/Read Burst Lower VCC Tolerance: 10% Upper VCC Tolerance: 10%Minimum Row Precharge Time 20 nsRow Active to Row Active Min 15 nsRAS to CAS Delay 20 nsMin RAS Pulse Width 44 nsRow Densities 128 MByteCommand and Address Signal Setup Time 1.5 nsCommand and Address Signal Hold Time 0.8 nsData Signal Setup Time 1.5 nsData Signal Hold Time 0.8 ns---=== Manufacturing Information ===---Manufacturer Micron TechnologyManufacturing Location Code 0x09Part Number 8LSDT1664AG-133G3 Revision Code 0x0300Manufacturing Date 2004-W24Assembly Serial Number 0xA517E4CE---=== Intel Specification ===---Frequency 100MHz or 133MHzDetails for 100MHz Support Intel Concurrent Auto-precharge CAS Latency = 2 CAS Latency = 3 Junction Temp A (100 degrees C) CLK 2 Connected CLK 0 Connected Single-sided DIMMDecoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0052Guessing DIMM is in bank 3---=== SPD EEPROM Information ===---EEPROM Checksum of bytes 0-62 OK (0xF6)# of bytes written to SDRAM EEPROM 128Total number of bytes in EEPROM 256Fundamental Memory type SDR SDRAMSPD Revision 18---=== Memory Characteristics ===---Size 128 MBtCL-tRCD-tRP-tRAS 3-3-3-7Number of Row Address Bits 12Number of Col Address Bits 10Number of Module Rows 1Data Width 64Module Interface Signal Levels LVTTLModule Configuration Type No ParityRefresh Type Self RefreshingRefresh Rate Normal (15.625 us)Primary SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 widthPrimary SDRAM Component Widths 8Error Checking SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 widthError Checking SDRAM Component Widths Undefined!Min Clock Delay for Back to Back Random Access 1Burst lengths supported 1, 2, 4, 8, PageNumber of Device Banks 4Supported CAS Latencies 2, 3Supported CS Latencies 0Supported WE Latencies 0Cycle Time (CAS 3) 8 nsAccess Time (CAS 3) 6 nsCycle Time (CAS 2) 10 nsAccess Time (CAS 2) 6 nsSDRAM Module Attributes (None Reported)SDRAM Device Attributes (General) Supports Auto-Precharge Supports Precharge All Supports Write1/Read Burst Lower VCC Tolerance: 10% Upper VCC Tolerance: 10%Minimum Row Precharge Time 20 nsRow Active to Row Active Min 20 nsRAS to CAS Delay 20 nsMin RAS Pulse Width 50 nsRow Densities 128 MByteCommand and Address Signal Setup Time 2 nsCommand and Address Signal Hold Time 1 nsData Signal Setup Time 2 nsData Signal Hold Time 1 ns---=== Manufacturing Information ===---Manufacturer Micron TechnologyManufacturing Location Code 0x08Part Number 8LSDT1664AG-10EE1 Revision Code 0x0100Manufacturing Date 2001-W12Assembly Serial Number 0x610898A5---=== Intel Specification ===---Frequency 100MHz or 133MHzDetails for 100MHz Support Intel Concurrent Auto-precharge CAS Latency = 2 CAS Latency = 3 Junction Temp A (100 degrees C) CLK 2 Connected CLK 0 Connected Single-sided DIMMNumber of SDRAM DIMMs detected and decoded: 3