rendered paste bodydiff --git a/src/radeon_driver.c b/src/radeon_driver.cindex ba4c111..910d76b 100644--- a/src/radeon_driver.c+++ b/src/radeon_driver.c@@ -729,7 +729,11 @@ unsigned RADEONINMC(ScrnInfoPtr pScrn, int addr) unsigned char *RADEONMMIO = info->MMIO; CARD32 data; - if (IS_AVIVO_VARIANT) {+ if (info->ChipFamily == CHIP_FAMILY_RS690)+ {+ OUTREG(RS690_MC_INDEX, (addr & RS690_MC_INDEX_MASK));+ data = INREG(RS690_MC_DATA);+ } else if (IS_AVIVO_VARIANT) { OUTREG(AVIVO_MC_INDEX, (addr & 0xff) | 0x7f0000); (void)INREG(AVIVO_MC_INDEX); data = INREG(AVIVO_MC_DATA);@@ -754,7 +758,13 @@ void RADEONOUTMC(ScrnInfoPtr pScrn, int addr, CARD32 data) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - if (IS_AVIVO_VARIANT) {+ if (info->ChipFamily == CHIP_FAMILY_RS690)+ {+ OUTREG(RS690_MC_INDEX, ((addr & RS690_MC_INDEX_MASK) |+ RS690_MC_INDEX_WR_EN));+ OUTREG(RS690_MC_DATA, data);+ OUTREG(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);+ } else if (IS_AVIVO_VARIANT) { OUTREG(AVIVO_MC_INDEX, (addr & 0xff) | 0xff0000); (void)INREG(AVIVO_MC_INDEX); OUTREG(AVIVO_MC_DATA, data);@@ -810,6 +820,11 @@ void radeon_write_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 fb_loc, if (mask & LOC_AGP) OUTMC(pScrn, RV515_MC_AGP_LOCATION, agp_loc); (void)INMC(pScrn, RV515_MC_AGP_LOCATION);+ } else if (info->ChipFamily == CHIP_FAMILY_RS690) {+ if (mask & LOC_FB)+ OUTMC(pScrn, RS690_MC_FB_LOCATION, fb_loc);+ if (mask & LOC_AGP)+ OUTMC(pScrn, RS690_MC_AGP_LOCATION, agp_loc); } else if (info->ChipFamily >= CHIP_FAMILY_R520) { if (mask & LOC_FB) OUTMC(pScrn, R520_MC_FB_LOCATION, fb_loc);@@ -843,6 +858,13 @@ void radeon_read_mc_fb_agp_location(ScrnInfoPtr pScrn, int mask, CARD32 *fb_loc, *agp_loc = INMC(pScrn, RV515_MC_AGP_LOCATION); *agp_loc_hi = 0; }+ } else if (info->ChipFamily == CHIP_FAMILY_RS690) {+ if (mask & LOC_FB)+ *fb_loc = INMC(pScrn, RS690_MC_FB_LOCATION);+ if (mask & LOC_AGP) {+ *agp_loc = INMC(pScrn, RS690_MC_AGP_LOCATION);+ *agp_loc_hi = 0;+ } } else if (info->ChipFamily >= CHIP_FAMILY_R520) { if (mask & LOC_FB) *fb_loc = INMC(pScrn, R520_MC_FB_LOCATION);@@ -1358,7 +1380,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) } if (mem_size == 0)- mem_size = 0x800000;+ mem_size = 0x800000; /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM - Novell bug 204882 + along with lots of ubuntu ones */@@ -1373,7 +1395,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) } #endif - {+ if (info->ChipFamily != CHIP_FAMILY_RS690) { if (info->IsIGP) info->mc_fb_location = INREG(RADEON_NB_TOM); else@@ -1568,7 +1590,9 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) MessageType from = X_PROBED; CARD32 accessible, bar_size; - if ((info->IsIGP)) {+ if (info->ChipFamily == CHIP_FAMILY_RS690) {+ pScrn->videoRam = INREG(RADEON_CONFIG_MEMSIZE);+ } else if (info->IsIGP) { CARD32 tom = INREG(RADEON_NB_TOM); pScrn->videoRam = (((tom >> 16) -diff --git a/src/radeon_reg.h b/src/radeon_reg.hindex 8737d2e..94c109b 100644--- a/src/radeon_reg.h+++ b/src/radeon_reg.h@@ -3271,6 +3271,15 @@ #define RADEON_RS480_UNK_e38 0xe38 #define RADEON_RS480_UNK_e3c 0xe3c +#define RS690_MC_INDEX 0x78+# define RS690_MC_INDEX_MASK 0x1ff+# define RS690_MC_INDEX_WR_EN (1 << 9)+# define RS690_MC_INDEX_WR_ACK 0x7f+#define RS690_MC_DATA 0x7c++#define RS690_MC_FB_LOCATION 0x100+#define RS690_MC_AGP_LOCATION 0x101+#define RS690_MC_AGP_BASE 0x102 #define AVIVO_MC_INDEX 0x0070 #define R520_MC_STATUS 0x00