rendered paste bodyBE:
seg000:01D00000 EE 11 0F 10 MRC p15, 0, R0,c1,c0 ; Move from Coprocessor to ARM Register
seg000:01D00004 E3 80 00 80 ORR R0, R0, #0x80 ; Rd = Op2 | Op1
seg000:01D00008 EE 01 0F 10 MCR p15, 0, R0,c1,c0 ; Move from ARM to Coprocessor Register
seg000:01D0000C EE 12 0F 10 MRC p15, 0, R0,c2,c0 ; Move from Coprocessor to ARM Register
seg000:01D00010 E1 A0 00 00 NOP ; No Operation
seg000:01D00014 E2 4F F0 04 ADR PC, loc_1D00018 ; Load address
LE:
seg000:01D00000 EE 11 0F 10 ANDNE R1, PC, LR,ROR#3 ; Rd = Op1 & Op2
seg000:01D00004 E3 80 00 80 ANDHI R8, R0, R3,ROR#1 ; Rd = Op1 & Op2
seg000:01D00008 EE 01 0F 10 ANDNE R0, PC, LR,ROR#3 ; Rd = Op1 & Op2
seg000:01D0000C EE 12 0F 10 ANDNE R1, PC, LR,ROR#5 ; Rd = Op1 & Op2
seg000:01D00010 E1 A0 00 00 ANDEQ R10, R0, R1,ROR#1 ; Rd = Op1 & Op2