rendered paste body; Progressive Display of LEDs from Input of ADC
; 06 Jul 2007 Jeffrey Drake
; Using ATtiny15L chip
.include "tn15def.inc"
.def LEDS = r16 ; temporary register
.def Delay = r17 ; Delay variable 1
.def Delay2 = r18 ; Delay variable 2
.def ADCSET = r19 ; for ADC setup
.org 0x0000 ; interrupt table
rjmp SETUP
SETUP:
; ser LEDS
; cbr LEDS, 1 ; PB5 is for ADC
ldi LEDS, 0x1F
out DDRB, LEDS ; set portb to output
ldi ADCSET, 0x80 ; ADCSR: Enable
out ADCSR, ADCSET
ldi ADCSET, 0x80 ; load ADMUX: REFS = 10, PB5, LAR=0
out ADMUX, ADCSET
ldi ADCSET, 0xE0 ; load ADCSR: Enable, Start and Free run
out ADCSR, ADCSET
STARTUP:
LOOP:
; read ADC value (low first, then high)
in ZL, ADCL
in ZH, ADCH
rcall ADC2LED ; translate to LED mapping
com LEDS ; invert, as 0 is on.
rcall UPDATE
rcall REST
rcall REST
rcall REST
rjmp LOOP ; repeat loop forever
ADC2LED:
; Converts the ADC output (1V design, 2.56V ref, 0 to 400) to
; counter of upto 5 LEDs.
;
; Expects Z to contain 0 to 400
; Range is halved for 8 bit processing
; Outputs Xl for bits of LED outputs.
; Mapping ADC to [LEDS]
; 0 40 80 120 160 200
; [ 1 ][ 2 ][ 3 ] [ 4 ] [ 5 ]
; State Diagram
; < >=
; 120
; / \
; 80 \
; / \ \
; 40 S3 160
; / \ / \
; S1 S2 S4 S5
; LEDs are progressively lit, thus S3 = 7 or 111b
; divide by two
lsr zh ; carries over to...
ror zl
; jump if < 120
cpi zl, 120
brlo state3
; jif < 160 (>=120)
cpi zl, 160
brlo state4
state5:
ldi LEDS, 31 ; 5 leds active, 160 >= x > 200
ret
state4:
ldi LEDS, 15 ; 4 leds active, 120 >= x > 160
ret
state3:
; jif < 80
cpi zl, 80
brlo state2
ldi LEDS, 7 ; 3 leds active, 80 >= x > 120
ret
state2:
; jif < 40
cpi zl, 40
brlo state1
ldi LEDS, 3 ; 2 leds active, 40 >= x > 80
ret
state1:
ldi LEDS, 1 ; 1 led active, 0 >= x > 40
ret
UPDATE:
out PORTB, LEDS ; update LEDs
ret
REST:
dec Delay
brne REST
dec Delay2
brne REST
clr Delay
clr Delay2
ret