Stuff

Welcome to my CSC 1004 Cache Project!This program demonstrates the behaviour of a 0.25KB cache (blocksize is 8 Bytes) accompanied by a 1KB memory. It demonstrates theuse of both Direct Mapped and Fully Associative cacheorganisations.The program takes address references in the range 0 .. 1023 anddetermines whether a given address reference is a hit or either acompulsory/conflict miss. It also computes the Miss and Hit Rateand displays all the information at the end of the cache contents.The output begins with the required memory content listingrandomly generated at each run.The extra feature of my implementation is that by using theconstructors of the various classes,the borders of the usage canbe extended to ANY size of cache (block) and/or memory. All thecomputations would remain correct.Please note that hence it was not part of the exercise, the codedoes not handle any exceptional situations!Enjoy!Printing out memory contents from 152 to 167.Index: 152	 Content: -34Index: 153	 Content: -45Index: 154	 Content: -94Index: 155	 Content: -95Index: 156	 Content: 75Index: 157	 Content: 7Index: 158	 Content: -79Index: 159	 Content: -122Index: 160	 Content: 34Index: 161	 Content: -35Index: 162	 Content: 27Index: 163	 Content: -10Index: 164	 Content: 8Index: 165	 Content: -18Index: 166	 Content: -77Index: 167	 Content: -52Printing out memory contents from 376 to 399.Index: 376	 Content: 69Index: 377	 Content: -116Index: 378	 Content: 21Index: 379	 Content: 105Index: 380	 Content: -120Index: 381	 Content: -25Index: 382	 Content: 100Index: 383	 Content: 53Index: 384	 Content: -12Index: 385	 Content: -101Index: 386	 Content: -92Index: 387	 Content: -55Index: 388	 Content: 29Index: 389	 Content: -99Index: 390	 Content: -110Index: 391	 Content: -5Index: 392	 Content: 84Index: 393	 Content: 62Index: 394	 Content: 38Index: 395	 Content: -53Index: 396	 Content: 54Index: 397	 Content: 89Index: 398	 Content: 55Index: 399	 Content: 96Printing out memory contents from 496 to 551.Index: 496	 Content: 112Index: 497	 Content: -115Index: 498	 Content: 67Index: 499	 Content: 105Index: 500	 Content: -77Index: 501	 Content: -12Index: 502	 Content: 123Index: 503	 Content: 43Index: 504	 Content: 125Index: 505	 Content: -34Index: 506	 Content: 87Index: 507	 Content: -57Index: 508	 Content: -25Index: 509	 Content: -46Index: 510	 Content: 89Index: 511	 Content: -64Index: 512	 Content: 17Index: 513	 Content: -73Index: 514	 Content: -119Index: 515	 Content: -19Index: 516	 Content: 20Index: 517	 Content: -102Index: 518	 Content: 50Index: 519	 Content: -96Index: 520	 Content: -86Index: 521	 Content: -115Index: 522	 Content: 106Index: 523	 Content: 20Index: 524	 Content: 42Index: 525	 Content: -32Index: 526	 Content: 125Index: 527	 Content: 1Index: 528	 Content: 69Index: 529	 Content: 100Index: 530	 Content: -88Index: 531	 Content: 74Index: 532	 Content: -83Index: 533	 Content: 29Index: 534	 Content: 26Index: 535	 Content: 100Index: 536	 Content: -109Index: 537	 Content: -55Index: 538	 Content: -34Index: 539	 Content: 120Index: 540	 Content: 75Index: 541	 Content: 44Index: 542	 Content: 10Index: 543	 Content: -49Index: 544	 Content: 32Index: 545	 Content: -71Index: 546	 Content: -104Index: 547	 Content: 51Index: 548	 Content: 57Index: 549	 Content: -47Index: 550	 Content: -85Index: 551	 Content: 86Printing out memory contents from 1000 to 1023.Index: 1000	 Content: 91Index: 1001	 Content: -85Index: 1002	 Content: 17Index: 1003	 Content: 100Index: 1004	 Content: 49Index: 1005	 Content: -117Index: 1006	 Content: -5Index: 1007	 Content: 121Index: 1008	 Content: 75Index: 1009	 Content: 30Index: 1010	 Content: 38Index: 1011	 Content: 102Index: 1012	 Content: 98Index: 1013	 Content: -50Index: 1014	 Content: 108Index: 1015	 Content: 28Index: 1016	 Content: 116Index: 1017	 Content: 1Index: 1018	 Content: -37Index: 1019	 Content: -29Index: 1020	 Content: -21Index: 1021	 Content: 98Index: 1022	 Content: -63Index: 1023	 Content: 14Direct Mapped Cache:Cache Index	Validity Bit	Cache Tag	Data========================================================================================0		true		2		[17, -73, -119, -19, 20, -102, 50, -96]1		true		2		[-86, -115, 106, 20, 42, -32, 125, 1]2		true		2		[69, 100, -88, 74, -83, 29, 26, 100]3		true		2		[-109, -55, -34, 120, 75, 44, 10, -49]4		true		2		[32, -71, -104, 51, 57, -47, -85, 86]5		true		2		[-78, -81, 114, -48, -96, 32, -22, -89]6		false		0		[0, 0, 0, 0, 0, 0, 0, 0]7		true		0		[69, 74, -67, 84, -64, -76, 17, -80]8		true		0		[115, -36, 115, -35, 90, -26, 35, 120]9		true		0		[26, 73, -120, -18, 13, -61, -70, -49]10		false		0		[0, 0, 0, 0, 0, 0, 0, 0]11		false		0		[0, 0, 0, 0, 0, 0, 0, 0]12		false		0		[0, 0, 0, 0, 0, 0, 0, 0]13		false		0		[0, 0, 0, 0, 0, 0, 0, 0]14		false		0		[0, 0, 0, 0, 0, 0, 0, 0]15		true		1		[-30, -12, -13, -46, -12, -98, 22, -68]16		true		1		[107, 78, 15, -2, -10, -102, 87, 40]17		true		1		[103, 1, -54, 109, -81, -69, 27, 55]18		true		1		[31, 117, 0, 10, 118, -23, -87, 15]19		true		1		[-34, -45, -94, -95, 75, 7, -79, -122]20		true		1		[34, -35, 27, -10, 8, -18, -77, -52]21		true		1		[-116, -30, 78, 82, 30, 53, -113, 27]22		false		0		[0, 0, 0, 0, 0, 0, 0, 0]23		false		0		[0, 0, 0, 0, 0, 0, 0, 0]24		false		0		[0, 0, 0, 0, 0, 0, 0, 0]25		false		0		[0, 0, 0, 0, 0, 0, 0, 0]26		false		0		[0, 0, 0, 0, 0, 0, 0, 0]27		true		3		[76, 101, 50, -20, 116, -97, 75, -118]28		true		3		[79, 9, 58, -106, 13, 120, 65, 11]29		true		3		[126, 92, -42, 46, 96, -11, 45, 26]30		true		3		[-26, 94, -85, 56, -10, 82, -24, 93]31		true		3		[-51, -88, 125, -97, 77, 121, -55, -9]Total Operations: 	84Compulsory Misses: 	21Conflict Misses: 	29Total nr. of Misses: 	50Hits: 			34Hit Ratio: 		40.476190476190474 %Miss Ratio: 		59.523809523809526 %Fully Associative Cache:Cache Index	Validity Bit	Cache Tag	Data========================================================================================0		true		52		[100, -127, -89, -86, -116, 64, -124, 58]1		true		123		[-44, 49, 67, 0, -37, 6, -85, -102]2		true		124		[15, -99, -7, 50, 6, -87, -1, -68]3		true		126		[75, 30, 38, 102, 98, -50, 108, 28]4		true		127		[116, 1, -37, -29, -21, 98, -63, 14]5		true		113		[-110, -4, -12, 92, -87, 55, -67, 115]6		true		114		[33, -84, -82, 21, -55, 105, 32, 96]7		true		115		[-107, 62, -54, 7, 69, 14, -16, -120]8		true		116		[37, -55, -1, 52, -53, -13, 124, 28]9		true		117		[93, 26, -108, 73, 96, -35, -57, -57]10		true		59		[-2, 21, -68, -26, 75, -12, 84, -114]11		true		60		[20, 39, -10, -120, -76, 116, 51, -51]12		true		61		[99, 73, -112, 59, 88, 111, 8, 104]13		true		62		[112, -115, 67, 105, -77, -12, 123, 43]14		true		64		[17, -73, -119, -19, 20, -102, 50, -96]15		true		65		[-86, -115, 106, 20, 42, -32, 125, 1]16		true		66		[69, 100, -88, 74, -83, 29, 26, 100]17		true		67		[-109, -55, -34, 120, 75, 44, 10, -49]18		true		68		[32, -71, -104, 51, 57, -47, -85, 86]19		true		69		[-78, -81, 114, -48, -96, 32, -22, -89]20		true		16		[107, 78, 15, -2, -10, -102, 87, 40]21		true		19		[-34, -45, -94, -95, 75, 7, -79, -122]22		true		20		[34, -35, 27, -10, 8, -18, -77, -52]23		true		21		[-116, -30, 78, 82, 30, 53, -113, 27]24		true		17		[103, 1, -54, 109, -81, -69, 27, 55]25		true		27		[-28, 45, 70, -110, -5, 58, -117, -77]26		true		28		[78, -110, -21, 5, 95, -32, 42, -24]27		true		29		[-35, 110, 112, 49, 18, 12, 25, 108]28		true		30		[80, -37, -114, 2, 13, -117, -19, -59]29		true		31		[126, -8, -46, 23, 25, 77, 117, -61]30		true		47		[69, -116, 21, 105, -120, -25, 100, 53]31		true		48		[-12, -101, -92, -55, 29, -99, -110, -5]Total Operations: 	84Compulsory Misses: 	32Capacity Misses: 	10Total nr. of Misses: 	42Hits: 			42Hit Ratio: 		50.0 %Miss Ratio: 		50.0 %Program ended successfully. Thank you!2007 Zoltan Balogh @ Newcastle University 063656842