All pastes #468756 Raw Edit

Stuff

public text v1 · immutable
·published 2007-05-03 10:25 UTC
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<--------------copy-from-here-------------->
 eax in    eax      ebx      ecx      edx
00000000 0000000a 756e6547 6c65746e 49656e69
00000001 000006f6 01020800 0000e3bd bfebfbff
00000002 05b0b101 005657f0 00000000 2cb43049
00000003 00000000 00000000 00000000 00000000
00000004 00000000 00000000 00000000 00000000
00000005 00000040 00000040 00000003 00022220
00000006 00000001 00000002 00000001 00000000
00000007 00000000 00000000 00000000 00000000
00000008 00000400 00000000 00000000 00000000
00000009 00000000 00000000 00000000 00000000
0000000a 07280202 00000000 00000000 00000000

 eax in    eax      ebx      ecx      edx
80000000 80000008 00000000 00000000 00000000
80000001 00000000 00000000 00000001 20100000
80000002 65746e49 2952286c 726f4320 4d542865
80000003 43203229 20205550 20202020 54202020
80000004 30303437 20402020 36312e32 007a4847
80000005 00000000 00000000 00000000 00000000
80000006 00000000 00000000 10008040 00000000
80000007 00000000 00000000 00000000 00000000
80000008 00003024 00000000 00000000 00000000

Vendor ID: "GenuineIntel"; CPUID level 10

Intel-specific functions:
Version 000006f6:
Type 0 - Original OEM
Family 6 - :
                        Pentium Pro
                        Pentium 4
                        Pentium D
Extended family 0
Model 15 - Core 2 Duo
Extended model 0
Stepping 6
Reserved 0
<---------------copy-to-here--------------->

Extended brand string: "Intel(R) Core(TM)2 CPU         T7400  @ 2.16GHz"
CLFLUSH instruction cache line size: 8
Initial APIC ID: 1
Hyper threading siblings: 2

Feature flags 0x0000e3bdbfebfbff:
FPU    Floating Point Unit
VME    Virtual 8086 Mode Enhancements
DE     Debugging Extensions
PSE    Page Size Extensions
TSC    Time Stamp Counter
MSR    Model Specific Registers
PAE    Physical Address Extension
MCE    Machine Check Exception
CX8    COMPXCHG8B Instruction
APIC   On-chip Advanced Programmable Interrupt Controller present and enabled
SEP    Fast System Call
MTRR   Memory Type Range Registers
PGE    PTE Global Flag
MCA    Machine Check Architecture
CMOV   Conditional Move and Compare Instructions
PAT    Page Attribute Table
PSE36  36-bit Page Size Extension
CLFSH  CFLUSH instruction
DS     Debug store
ACPI   Thermal Monitor and Clock Ctrl
MMX    MMX instruction set
FXSR   Fast FP/MMX Streaming SIMD Extensions save/restore
SSE    Streaming SIMD Extensions instruction set
SSE2   SSE2 extensions
SS     Self Snoop
HT     Hyper Threading
TM     Thermal monitor
PBE    Pend Break Enable
SSE3   SSE3 extensions
34     reserved
MON    Monitor/mwait
DSCPL  Debug Store CPL
VMX    VMX extensions
EST    Enhanced SpeedsTep (GV3)
TM2    Thermal Monitor 2
SSSE3  SUPPLEMENTAL SSE3 instructions
MNI    MNI extensions
CX16   CX16 extensions
TPR    TPR extensions

TLB and cache info:
b1: unknown TLB/cache descriptor
b0: unknown TLB/cache descriptor
05: unknown TLB/cache descriptor
f0: unknown TLB/cache descriptor
57: unknown TLB/cache descriptor
56: unknown TLB/cache descriptor
49: unknown TLB/cache descriptor
30: unknown TLB/cache descriptor
b4: unknown TLB/cache descriptor
2c: unknown TLB/cache descriptor
Processor serial: 0000-06F6-0000-0000-0000-0000