LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY decod IS
PORT (
a,b,c,d,e,f,g : OUT std_logic;
choix : IN std_logic_vector(3 DOWNTO 0)
);
END decod;
ARCHITECTURE affichage OF decod IS
signal int : std_logic_vector(6 downto 0);
BEGIN
WITH choix SELECT
int <= "0000001" WHEN "0000",
"1001111" WHEN "0001",
"0010010" WHEN "0010",
"0000110" WHEN "0011",
"1001100" WHEN "0100",
"0100100" WHEN "0101",
"0100000" WHEN "0110",
"0001111" WHEN "0111",
"0000000" WHEN "1000",
"0000100" WHEN "1001",
"0001000" WHEN "1010",
"1100000" WHEN "1011",
"1110010" WHEN "1100",
"1000001" WHEN "1101",
"0110000" WHEN "1110",
"0111000" WHEN "1111",
"1111111" WHEN others;
a <= int(6);
b <= int(5);
c <= int(4);
d <= int(3);
e <= int(2);
f <= int(1);
g <= int(0);
END affichage;