All pastes #269120 Raw Edit

Anonymous

public text v1 · immutable
·published 2006-12-06 08:25 UTC
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bttv0: unloading
bttv: driver version 0.9.16 loaded
bttv: using 8 buffers with 2080k (520 pages) each for capture
bttv: Bt8xx card found (0).
bttv0: Bt874 (rev 2) at 0000:02:07.0, irq: 19, latency: 32, mmio: 0xf48bf000
bttv0: detected: Askey CPH050 [card=24], PCI subsystem ID is 144f:5000
bttv0: using: Askey CPH05X/06X (bt878) [many vendors] [card=24,insmod option]
bttv0: risc main @ 120fe000
bttv0: gpio: en=00000000, out=00000000 in=00fbffff [init]
bttv0: tveeprom i2c attach [addr=0x50,client=tveeprom]
tuner 0-0060: All bytes are equal. It is not a TEA5767
tuner 0-0060: chip found @ 0xc0 (bt874 #0 [sw])
bttv0: tuner i2c attach [addr=0x60,client=(tuner unset)]
tuner 0-0061: chip found @ 0xc2 (bt874 #0 [sw])
bttv0: tuner i2c attach [addr=0x61,client=(tuner unset)]
bttv0: using tuner=0
tuner 0-0060: type set to 0 (Temic PAL (4002 FH5))
bttv0: i2c: checking for MSP34xx @ 0x80... not found
bttv0: i2c: checking for TDA9875 @ 0xb0... not found
bttv0: i2c: checking for TDA7432 @ 0x8a... not found
bttv0: i2c: checking for TDA9887 @ 0x86... not found
bttv0: registered device video0
bttv0: registered device vbi0
bttv0: video mux: input=0 mux=2
bttv0: PLL: 28636363 => 35468950 . ok
input: bttv IR (card=24) as /class/input/input4
bttv: open minor=0
bttv0: open called (type=video-cap)
bttv: open minor=0
bttv0: open called (type=video-cap)
bttv: open minor=0
bttv0: open called (type=video-cap)
bttv0: read count=49152 type=video-cap
bttv0: buffer field: bottom  format: 32 bpp RGB, le  size: 128x96
bttv0: SCERR @ 12a96014,bits: HSYNC OFLOW FBUS SCERR*
  main: 120fe000
  vbi : o=00000000 e=00000000
  cap : o=00000000 e=00000000
  scr : o=00000000 e=00000000
bttv0: risc disasm: ffff8100120fe000 [dma=0x120fe000]
bttv0:   0x120fe000: 0x80008004 [ sync be3/resync count=4 ]
bttv0:   0x120fe004: 0x00000000 [ arg #1 ]
bttv0:   0x120fe008: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe00c: 0x120fe010 [ arg #1 ]
bttv0:   0x120fe010: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe014: 0x120fe018 [ arg #1 ]
bttv0:   0x120fe018: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe01c: 0x120fe020 [ arg #1 ]
bttv0:   0x120fe020: 0x8000800c [ sync be3/resync count=12 ]
bttv0:   0x120fe024: 0x00000000 [ arg #1 ]
bttv0:   0x120fe028: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe02c: 0x120fe030 [ arg #1 ]
bttv0:   0x120fe030: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe034: 0x120fe038 [ arg #1 ]
bttv0:   0x120fe038: 0x71e10000 [ jump irq clr3 clr2 clr1 set0 count=0 ]
bttv0:   0x120fe03c: 0x120fe000 [ arg #1 ]
bttv0:   0x120fe040: 0x00000000 [ INVALID count=0 ]
bttv0: SCERR @ 12a96014,bits: HSYNC OFLOW FBUS SCERR*
  main: 120fe000
  vbi : o=00000000 e=00000000
  cap : o=00000000 e=00000000
  scr : o=00000000 e=00000000
bttv0: risc disasm: ffff8100120fe000 [dma=0x120fe000]
bttv0:   0x120fe000: 0x80008004 [ sync be3/resync count=4 ]
bttv0:   0x120fe004: 0x00000000 [ arg #1 ]
bttv0:   0x120fe008: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe00c: 0x120fe010 [ arg #1 ]
bttv0:   0x120fe010: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe014: 0x120fe018 [ arg #1 ]
bttv0:   0x120fe018: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe01c: 0x120fe020 [ arg #1 ]
bttv0:   0x120fe020: 0x8000800c [ sync be3/resync count=12 ]
bttv0:   0x120fe024: 0x00000000 [ arg #1 ]
bttv0:   0x120fe028: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe02c: 0x120fe030 [ arg #1 ]
bttv0:   0x120fe030: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe034: 0x120fe038 [ arg #1 ]
bttv0:   0x120fe038: 0x71e10000 [ jump irq clr3 clr2 clr1 set0 count=0 ]
bttv0:   0x120fe03c: 0x120fe000 [ arg #1 ]
bttv0:   0x120fe040: 0x00000000 [ INVALID count=0 ]
bttv0: SCERR @ 12a96014,bits: HSYNC OFLOW FBUS SCERR*
  main: 120fe000
  vbi : o=00000000 e=00000000
  cap : o=00000000 e=00000000
  scr : o=00000000 e=00000000
bttv0: risc disasm: ffff8100120fe000 [dma=0x120fe000]
bttv0:   0x120fe000: 0x80008004 [ sync be3/resync count=4 ]
bttv0:   0x120fe004: 0x00000000 [ arg #1 ]
bttv0:   0x120fe008: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe00c: 0x120fe010 [ arg #1 ]
bttv0:   0x120fe010: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe014: 0x120fe018 [ arg #1 ]
bttv0:   0x120fe018: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe01c: 0x120fe020 [ arg #1 ]
bttv0:   0x120fe020: 0x8000800c [ sync be3/resync count=12 ]
bttv0:   0x120fe024: 0x00000000 [ arg #1 ]
bttv0:   0x120fe028: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe02c: 0x120fe030 [ arg #1 ]
bttv0:   0x120fe030: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe034: 0x120fe038 [ arg #1 ]
bttv0:   0x120fe038: 0x71e10000 [ jump irq clr3 clr2 clr1 set0 count=0 ]
bttv0:   0x120fe03c: 0x120fe000 [ arg #1 ]
bttv0:   0x120fe040: 0x00000000 [ INVALID count=0 ]
bttv0: timeout: drop=0 irq=789/789, risc=12a96014, bits: HSYNC OFLOW FBUS
bttv0: reset, reinitialize
bttv0: video mux: input=0 mux=2
bttv0: PLL: 28636363 => 35468950 . ok
switch_overlay: enter [new=0000000000000000]
switch_overlay: done
bttv0: SCERR @ 12a96014,bits: VSYNC HSYNC OFLOW FBUS SCERR*
  main: 120fe000
  vbi : o=00000000 e=00000000
  cap : o=00000000 e=00000000
  scr : o=00000000 e=00000000
bttv0: risc disasm: ffff8100120fe000 [dma=0x120fe000]
bttv0:   0x120fe000: 0x80008004 [ sync be3/resync count=4 ]
bttv0:   0x120fe004: 0x00000000 [ arg #1 ]
bttv0:   0x120fe008: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe00c: 0x120fe010 [ arg #1 ]
bttv0:   0x120fe010: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe014: 0x120fe018 [ arg #1 ]
bttv0:   0x120fe018: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe01c: 0x120fe020 [ arg #1 ]
bttv0:   0x120fe020: 0x8000800c [ sync be3/resync count=12 ]
bttv0:   0x120fe024: 0x00000000 [ arg #1 ]
bttv0:   0x120fe028: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe02c: 0x120fe030 [ arg #1 ]
bttv0:   0x120fe030: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe034: 0x120fe038 [ arg #1 ]
bttv0:   0x120fe038: 0x71e10000 [ jump irq clr3 clr2 clr1 set0 count=0 ]
bttv0:   0x120fe03c: 0x120fe000 [ arg #1 ]
bttv0:   0x120fe040: 0x00000000 [ INVALID count=0 ]
bttv0: SCERR @ 12a96014,bits: VSYNC HSYNC OFLOW FBUS SCERR*
  main: 120fe000
  vbi : o=00000000 e=00000000
  cap : o=00000000 e=00000000
  scr : o=00000000 e=00000000
bttv0: risc disasm: ffff8100120fe000 [dma=0x120fe000]
bttv0:   0x120fe000: 0x80008004 [ sync be3/resync count=4 ]
bttv0:   0x120fe004: 0x00000000 [ arg #1 ]
bttv0:   0x120fe008: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe00c: 0x120fe010 [ arg #1 ]
bttv0:   0x120fe010: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe014: 0x120fe018 [ arg #1 ]
bttv0:   0x120fe018: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe01c: 0x120fe020 [ arg #1 ]
bttv0:   0x120fe020: 0x8000800c [ sync be3/resync count=12 ]
bttv0:   0x120fe024: 0x00000000 [ arg #1 ]
bttv0:   0x120fe028: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe02c: 0x120fe030 [ arg #1 ]
bttv0:   0x120fe030: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe034: 0x120fe038 [ arg #1 ]
bttv0:   0x120fe038: 0x71e10000 [ jump irq clr3 clr2 clr1 set0 count=0 ]
bttv0:   0x120fe03c: 0x120fe000 [ arg #1 ]
bttv0:   0x120fe040: 0x00000000 [ INVALID count=0 ]
bttv0: SCERR @ 12a96014,bits: VSYNC HSYNC OFLOW FBUS SCERR*
  main: 120fe000
  vbi : o=00000000 e=00000000
  cap : o=00000000 e=00000000
  scr : o=00000000 e=00000000
bttv0: risc disasm: ffff8100120fe000 [dma=0x120fe000]
bttv0:   0x120fe000: 0x80008004 [ sync be3/resync count=4 ]
bttv0:   0x120fe004: 0x00000000 [ arg #1 ]
bttv0:   0x120fe008: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe00c: 0x120fe010 [ arg #1 ]
bttv0:   0x120fe010: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe014: 0x120fe018 [ arg #1 ]
bttv0:   0x120fe018: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe01c: 0x120fe020 [ arg #1 ]
bttv0:   0x120fe020: 0x8000800c [ sync be3/resync count=12 ]
bttv0:   0x120fe024: 0x00000000 [ arg #1 ]
bttv0:   0x120fe028: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe02c: 0x120fe030 [ arg #1 ]
bttv0:   0x120fe030: 0x70000000 [ jump count=0 ]
bttv0:   0x120fe034: 0x120fe038 [ arg #1 ]
bttv0:   0x120fe038: 0x71e10000 [ jump irq clr3 clr2 clr1 set0 count=0 ]
bttv0:   0x120fe03c: 0x120fe000 [ arg #1 ]
bttv0:   0x120fe040: 0x00000000 [ INVALID count=0 ]
bttv0: timeout: drop=0 irq=802/802, risc=12a96014, bits: VSYNC HSYNC OFLOW FBUS