[17179599.380000] speedstep-centrino: adding state 0 with frequency 2167000 and control value 0d2c
[17179599.380000] speedstep-centrino: adding state 1 with frequency 1667000 and control value 0a22
[17179599.380000] speedstep-centrino: adding state 2 with frequency 1333000 and control value 081b
[17179599.380000] speedstep-centrino: adding state 3 with frequency 1000000 and control value 0613
[17179599.380000] speedstep-centrino: centrino_cpu_init: cur=2167000kHz
[17179599.380000] speedstep-centrino: no change needed - msr was and needs to be d2c
[17179599.380000] speedstep-centrino: no change needed - msr was and needs to be d2c
[17179599.384000] speedstep-centrino: adding state 0 with frequency 2167000 and control value 0d2c
[17179599.384000] speedstep-centrino: adding state 1 with frequency 1667000 and control value 0a22
[17179599.384000] speedstep-centrino: adding state 2 with frequency 1333000 and control value 081b
[17179599.384000] speedstep-centrino: adding state 3 with frequency 1000000 and control value 0613
[17179599.384000] speedstep-centrino: centrino_cpu_init: cur=2167000kHz