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Oct 30 15:42:20 testbox syslogd 1.4.1: restart.
Oct 30 15:42:20 testbox kernel: klogd 1.4.1, log source = /proc/kmsg started.
Oct 30 15:42:25 testbox kernel: [17658723.904000] mantis_core_exit (2): DMA engine stopping
Oct 30 15:42:25 testbox kernel: [17658723.904000] mantis_dma_exit (2): DMA=0xb610000 cpu=0xcb610000 size=65536
Oct 30 15:42:25 testbox kernel: [17658723.904000] mantis_dma_exit (2): RISC=0x1b742000 cpu=0xdb742000 size=1000
Oct 30 15:42:25 testbox kernel: [17658723.908000] mantis_pci_remove (2): Removing -->Mantis irq: 19, latency: 64
Oct 30 15:42:25 testbox kernel: [17658723.908000]  memory: 0xe3bfd000, mmio: 0xe5a32000
Oct 30 15:42:25 testbox kernel: [17658723.908000] mantis_core_exit (1): DMA engine stopping
Oct 30 15:42:25 testbox kernel: [17658723.908000] mantis_dma_exit (1): DMA=0x13200000 cpu=0xd3200000 size=65536
Oct 30 15:42:25 testbox kernel: [17658723.908000] mantis_dma_exit (1): RISC=0x1b70c000 cpu=0xdb70c000 size=1000
Oct 30 15:42:26 testbox kernel: [17658724.132000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:42:26 testbox kernel: [17658724.148000] stb0899_release: Release Frontend
Oct 30 15:42:26 testbox kernel: [17658724.148000] mantis_pci_remove (1): Removing -->Mantis irq: 20, latency: 64
Oct 30 15:42:26 testbox kernel: [17658724.148000]  memory: 0xe3bfe000, mmio: 0xe5a2c000
Oct 30 15:42:26 testbox kernel: [17658724.148000] mantis_core_exit (0): DMA engine stopping
Oct 30 15:42:26 testbox kernel: [17658724.148000] mantis_dma_exit (0): DMA=0x12520000 cpu=0xd2520000 size=65536
Oct 30 15:42:26 testbox kernel: [17658724.148000] mantis_dma_exit (0): RISC=0x12faa000 cpu=0xd2faa000 size=1000
Oct 30 15:42:26 testbox kernel: [17658724.148000] mantis_pci_remove (0): Removing -->Mantis irq: 19, latency: 64
Oct 30 15:42:26 testbox kernel: [17658724.148000]  memory: 0xe3bff000, mmio: 0xe5a2a000
Oct 30 15:42:43 testbox kernel: [17658741.984000] ACPI: PCI Interrupt 0000:02:09.0[A] -> GSI 21 (level, low) -> IRQ 19
Oct 30 15:42:43 testbox kernel: [17658741.988000] 
Oct 30 15:42:43 testbox kernel: [17658741.988000] gpif status: 6000  irqcfg: 0002
Oct 30 15:42:43 testbox kernel: [17658741.988000] mantis_set_direction (0): TS direction setup
Oct 30 15:42:43 testbox kernel: [17658741.988000] found a VP-3030 PCI DVB-T device on (02:09.0),
Oct 30 15:42:43 testbox kernel: [17658741.988000]     Mantis Rev 1 [1822:0024], irq: 19, latency: 64
Oct 30 15:42:43 testbox kernel: [17658741.988000]     memory: 0xe3bff000, mmio: 0xe5a2e000
Oct 30 15:42:43 testbox kernel: [17658741.988000] mantis_i2c_init (0): Initializing I2C ..
Oct 30 15:42:43 testbox kernel: [17658741.988000] mantis_i2c_init (0): [0x04000000/00000001]
Oct 30 15:42:43 testbox kernel: [17658741.988000] mantis_i2c_write (0): Address=[0x50]
Oct 30 15:42:43 testbox kernel: [17658741.988000] mantis_i2c_write (0): Data<W[0]>=[0x08]
Oct 30 15:42:43 testbox kernel: [17658741.988000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:43 testbox kernel: [17658742.004000] mantis_i2c_read (0): Address=[0x50]
Oct 30 15:42:43 testbox kernel: [17658742.004000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:43 testbox kernel: [17658742.020000] mantis_i2c_read (0): Data<R[0]>=[0x00]
Oct 30 15:42:43 testbox kernel: [17658742.028000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:43 testbox kernel: [17658742.044000] mantis_i2c_read (0): Data<R[1]>=[0x08]
Oct 30 15:42:43 testbox kernel: [17658742.052000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:43 testbox kernel: [17658742.068000] mantis_i2c_read (0): Data<R[2]>=[0xca]
Oct 30 15:42:43 testbox kernel: [17658742.076000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:43 testbox kernel: [17658742.092000] mantis_i2c_read (0): Data<R[3]>=[0x1a]
Oct 30 15:42:43 testbox kernel: [17658742.100000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.116000] mantis_i2c_read (0): Data<R[4]>=[0x4d]
Oct 30 15:42:44 testbox kernel: [17658742.124000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.140000] mantis_i2c_read (0): Data<R[5]>=[0xde]
Oct 30 15:42:44 testbox kernel: [17658742.156000]     MAC Address=[00:08:ca:1a:4d:de]
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_dma_init (0): Mantis DMA init
Oct 30 15:42:44 testbox kernel: [17658742.156000]     DMA=0x12520000 cpu=0xd2520000 size=65536
Oct 30 15:42:44 testbox kernel: [17658742.156000]     RISC=0x1bc00000 cpu=0xdbc00000 size=1000
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_calc_lines (0): Mantis RISC block bytes=[4096], line bytes=[2048], line count=[32]
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_dvb_init (0): dvb_register_adapter
Oct 30 15:42:44 testbox kernel: [17658742.156000] DVB: registering new adapter (Mantis dvb adapter).
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_dvb_init (0): dvb_dmx_init
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_dvb_init (0): dvb_dmxdev_init
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_frontend_init (0): Mantis frontend Init
Oct 30 15:42:44 testbox kernel: [17658742.156000] mantis_fe_powerup (0): Frontend Power ON
Oct 30 15:42:44 testbox kernel: [17658742.364000] mantis_frontend_reset (0): Frontend Reset
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_frontend_init (0): Device ID=24
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_frontend_init (0): Unknown frontend:[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_uart_init (0): Initializing .. 
Oct 30 15:42:44 testbox kernel: [17658742.676000] ACPI: PCI Interrupt 0000:02:0b.0[A] -> GSI 23 (level, low) -> IRQ 20
Oct 30 15:42:44 testbox kernel: [17658742.676000] 
Oct 30 15:42:44 testbox kernel: [17658742.676000] gpif status: 6000  irqcfg: 0002
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_set_direction (1): TS direction setup
Oct 30 15:42:44 testbox kernel: [17658742.676000] found a VP-1041 PCI DVB-S/DSS/DVB-S2 Multistandard device on (02:0b.0),
Oct 30 15:42:44 testbox kernel: [17658742.676000]     Mantis Rev 1 [1822:0031], irq: 20, latency: 64
Oct 30 15:42:44 testbox kernel: [17658742.676000]     memory: 0xe3bfe000, mmio: 0xe5a30000
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_i2c_init (1): Initializing I2C ..
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_i2c_init (1): [0x04000000/00000001]
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_i2c_write (1): Address=[0x50]
Oct 30 15:42:44 testbox kernel: [17658742.676000] mantis_i2c_write (1): Data<W[0]>=[0x08]
Oct 30 15:42:44 testbox kernel: [17658742.676000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.692000] mantis_i2c_read (1): Address=[0x50]
Oct 30 15:42:44 testbox kernel: [17658742.692000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.708000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.716000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.732000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.740000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.756000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.764000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.780000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.788000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.804000] mantis_i2c_read (1): Data<R[4]>=[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.812000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:44 testbox kernel: [17658742.828000] mantis_i2c_read (1): Data<R[5]>=[0x00]
Oct 30 15:42:44 testbox kernel: [17658742.844000]     MAC Address=[00:00:00:00:00:00]
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_dma_init (1): Mantis DMA init
Oct 30 15:42:44 testbox kernel: [17658742.844000]     DMA=0x13200000 cpu=0xd3200000 size=65536
Oct 30 15:42:44 testbox kernel: [17658742.844000]     RISC=0x13035000 cpu=0xd3035000 size=1000
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_calc_lines (1): Mantis RISC block bytes=[4096], line bytes=[2048], line count=[32]
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_dvb_init (1): dvb_register_adapter
Oct 30 15:42:44 testbox kernel: [17658742.844000] DVB: registering new adapter (Mantis dvb adapter).
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_dvb_init (1): dvb_dmx_init
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_dvb_init (1): dvb_dmxdev_init
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_frontend_init (1): Mantis frontend Init
Oct 30 15:42:44 testbox kernel: [17658742.844000] mantis_fe_powerup (1): Frontend Power ON
Oct 30 15:42:44 testbox kernel: [17658743.052000] mantis_frontend_reset (1): Frontend Reset
Oct 30 15:42:45 testbox kernel: [17658743.372000] mantis_frontend_init (1): Device ID=31
Oct 30 15:42:45 testbox kernel: [17658743.372000] mantis_frontend_init (1): Probing for a STB0899 (DVB-S/DSS/DVB-S2)
Oct 30 15:42:45 testbox kernel: [17658743.372000] stb0899_get_dev_id: Disable STANDBY mode
Oct 30 15:42:45 testbox kernel: [17658743.372000] stb0899_write_reg: Norm Write buf=[f1 b6 00 00]
Oct 30 15:42:45 testbox kernel: [17658743.372000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.372000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:42:45 testbox kernel: [17658743.372000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.392000] mantis_i2c_write (1): Data<W[1]>=[0xb6]
Oct 30 15:42:45 testbox kernel: [17658743.392000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.412000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658743.412000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.432000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.432000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:42:45 testbox kernel: [17658743.432000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.452000] mantis_i2c_write (1): Data<W[1]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658743.452000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.472000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.472000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.488000] mantis_i2c_read (1): Data<R[0]>=[0x81]
Oct 30 15:42:45 testbox kernel: [17658743.504000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.516000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658743.528000] stb0899_read_reg: Norm Read buf=[00 81]
Oct 30 15:42:45 testbox kernel: [17658743.532000] stb0899_get_dev_id: Device ID=[8], Release=[1]
Oct 30 15:42:45 testbox kernel: [17658743.532000] stb0899_read_s2reg: Device=[0xf3fc], Offset=[0xf334]
Oct 30 15:42:45 testbox kernel: [17658743.532000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.532000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:42:45 testbox kernel: [17658743.532000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.552000] mantis_i2c_write (1): Data<W[1]>=[0xfc]
Oct 30 15:42:45 testbox kernel: [17658743.552000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.572000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658743.572000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.592000] mantis_i2c_write (1): Data<W[3]>=[0x04]
Oct 30 15:42:45 testbox kernel: [17658743.592000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.612000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658743.612000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.632000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658743.632000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.652000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.652000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:42:45 testbox kernel: [17658743.652000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.672000] mantis_i2c_write (1): Data<W[1]>=[0x34]
Oct 30 15:42:45 testbox kernel: [17658743.672000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.692000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.692000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.708000] mantis_i2c_read (1): Data<R[0]>=[0x31]
Oct 30 15:42:45 testbox kernel: [17658743.724000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.740000] mantis_i2c_read (1): Data<R[1]>=[0x44]
Oct 30 15:42:45 testbox kernel: [17658743.756000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.772000] mantis_i2c_read (1): Data<R[2]>=[0x4d]
Oct 30 15:42:45 testbox kernel: [17658743.788000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.804000] mantis_i2c_read (1): Data<R[3]>=[0x44]
Oct 30 15:42:45 testbox kernel: [17658743.816000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.820000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:42:45 testbox kernel: [17658743.820000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.840000] mantis_i2c_write (1): Data<W[1]>=[0x34]
Oct 30 15:42:45 testbox kernel: [17658743.840000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.860000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.860000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.876000] mantis_i2c_read (1): Data<R[0]>=[0x31]
Oct 30 15:42:45 testbox kernel: [17658743.892000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.904000] mantis_i2c_read (1): Data<R[1]>=[0x44]
Oct 30 15:42:45 testbox kernel: [17658743.920000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.932000] mantis_i2c_read (1): Data<R[2]>=[0x4d]
Oct 30 15:42:45 testbox kernel: [17658743.948000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.960000] mantis_i2c_read (1): Data<R[3]>=[0x44]
Oct 30 15:42:45 testbox kernel: [17658743.972000] stb0899_read_s2reg: S2 Read buf=[44 4d 44 31]
Oct 30 15:42:45 testbox kernel: [17658743.976000] stb0899_read_s2reg: Device=[0xf3fc], Offset=[0xf33c]
Oct 30 15:42:45 testbox kernel: [17658743.976000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658743.976000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:42:45 testbox kernel: [17658743.976000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658743.996000] mantis_i2c_write (1): Data<W[1]>=[0xfc]
Oct 30 15:42:45 testbox kernel: [17658743.996000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658744.016000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658744.016000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658744.036000] mantis_i2c_write (1): Data<W[3]>=[0x04]
Oct 30 15:42:45 testbox kernel: [17658744.036000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658744.056000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658744.056000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658744.076000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:42:45 testbox kernel: [17658744.076000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:45 testbox kernel: [17658744.096000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:45 testbox kernel: [17658744.096000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:42:45 testbox kernel: [17658744.096000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.116000] mantis_i2c_write (1): Data<W[1]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.116000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.136000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.136000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.152000] mantis_i2c_read (1): Data<R[0]>=[0x01]
Oct 30 15:42:46 testbox kernel: [17658744.164000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.176000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.188000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.200000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.212000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.224000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.232000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.232000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:42:46 testbox kernel: [17658744.236000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.256000] mantis_i2c_write (1): Data<W[1]>=[0x3c]
Oct 30 15:42:46 testbox kernel: [17658744.256000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.276000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.276000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.292000] mantis_i2c_read (1): Data<R[0]>=[0x01]
Oct 30 15:42:46 testbox kernel: [17658744.304000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.316000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.328000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.340000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.352000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.364000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.372000] stb0899_read_s2reg: S2 Read buf=[00 00 00 01]
Oct 30 15:42:46 testbox kernel: [17658744.376000] stb0899_get_dev_id: Demodulator Core ID=[DMD1], Version=[1]
Oct 30 15:42:46 testbox kernel: [17658744.376000] stb0899_read_s2reg: Device=[0xfafc], Offset=[0xfa2c]
Oct 30 15:42:46 testbox kernel: [17658744.376000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.376000] mantis_i2c_write (1): Data<W[0]>=[0xfa]
Oct 30 15:42:46 testbox kernel: [17658744.376000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.396000] mantis_i2c_write (1): Data<W[1]>=[0xfc]
Oct 30 15:42:46 testbox kernel: [17658744.396000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.416000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.416000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.436000] mantis_i2c_write (1): Data<W[3]>=[0x08]
Oct 30 15:42:46 testbox kernel: [17658744.436000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.456000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.456000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.476000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.476000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.496000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.496000] mantis_i2c_write (1): Data<W[0]>=[0xfa]
Oct 30 15:42:46 testbox kernel: [17658744.496000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.516000] mantis_i2c_write (1): Data<W[1]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.516000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.536000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.536000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.552000] mantis_i2c_read (1): Data<R[0]>=[0x4c]
Oct 30 15:42:46 testbox kernel: [17658744.568000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.580000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.592000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.604000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.616000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.628000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.636000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.636000] mantis_i2c_write (1): Data<W[0]>=[0xfa]
Oct 30 15:42:46 testbox kernel: [17658744.640000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.660000] mantis_i2c_write (1): Data<W[1]>=[0x2c]
Oct 30 15:42:46 testbox kernel: [17658744.660000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.680000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.680000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.696000] mantis_i2c_read (1): Data<R[0]>=[0x31]
Oct 30 15:42:46 testbox kernel: [17658744.708000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.720000] mantis_i2c_read (1): Data<R[1]>=[0x43]
Oct 30 15:42:46 testbox kernel: [17658744.732000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.744000] mantis_i2c_read (1): Data<R[2]>=[0x45]
Oct 30 15:42:46 testbox kernel: [17658744.756000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.768000] mantis_i2c_read (1): Data<R[3]>=[0x46]
Oct 30 15:42:46 testbox kernel: [17658744.776000] stb0899_read_s2reg: S2 Read buf=[46 45 43 31]
Oct 30 15:42:46 testbox kernel: [17658744.776000] stb0899_read_s2reg: Device=[0xfafc], Offset=[0xfa34]
Oct 30 15:42:46 testbox kernel: [17658744.780000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.780000] mantis_i2c_write (1): Data<W[0]>=[0xfa]
Oct 30 15:42:46 testbox kernel: [17658744.780000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.800000] mantis_i2c_write (1): Data<W[1]>=[0xfc]
Oct 30 15:42:46 testbox kernel: [17658744.800000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.820000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.820000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.840000] mantis_i2c_write (1): Data<W[3]>=[0x08]
Oct 30 15:42:46 testbox kernel: [17658744.840000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.860000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.860000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.880000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.880000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.900000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.900000] mantis_i2c_write (1): Data<W[0]>=[0xfa]
Oct 30 15:42:46 testbox kernel: [17658744.900000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.920000] mantis_i2c_write (1): Data<W[1]>=[0x34]
Oct 30 15:42:46 testbox kernel: [17658744.920000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.940000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658744.940000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.956000] mantis_i2c_read (1): Data<R[0]>=[0x01]
Oct 30 15:42:46 testbox kernel: [17658744.968000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658744.980000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658744.992000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658745.004000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658745.016000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658745.028000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:42:46 testbox kernel: [17658745.036000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658745.036000] mantis_i2c_write (1): Data<W[0]>=[0xfa]
Oct 30 15:42:46 testbox kernel: [17658745.040000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658745.056000] mantis_i2c_write (1): Data<W[1]>=[0x34]
Oct 30 15:42:46 testbox kernel: [17658745.056000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658745.076000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:42:46 testbox kernel: [17658745.076000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:46 testbox kernel: [17658745.092000] mantis_i2c_read (1): Data<R[0]>=[0x01]
Oct 30 15:42:46 testbox kernel: [17658745.104000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.116000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:42:47 testbox kernel: [17658745.128000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.140000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:42:47 testbox kernel: [17658745.152000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.164000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:42:47 testbox kernel: [17658745.172000] stb0899_read_s2reg: S2 Read buf=[00 00 00 01]
Oct 30 15:42:47 testbox kernel: [17658745.172000] stb0899_get_dev_id: FEC Core ID=[FEC1], Version=[1]
Oct 30 15:42:47 testbox kernel: [17658745.172000] stb0899_attach: Attaching STB0899 
Oct 30 15:42:47 testbox kernel: [17658745.176000] mantis_frontend_init (1): found STB0899 DVB-S/DSS/DVB-S2 frontend @0x68
Oct 30 15:42:47 testbox kernel: [17658745.176000] mantis_frontend_init (1): Probing for a STB6100 Silicon Tuner
Oct 30 15:42:47 testbox kernel: [17658745.176000] stb6100_attach: Attaching
Oct 30 15:42:47 testbox kernel: [17658745.176000] mantis_frontend_init (1): found STB6100 Silicon Tuner @0x60
Oct 30 15:42:47 testbox kernel: [17658745.176000] mantis_frontend_init (1): Probing for a LNBP21 SEC
Oct 30 15:42:47 testbox kernel: [17658745.176000] mantis_i2c_write (1): Address=[0x08]
Oct 30 15:42:47 testbox kernel: [17658745.176000] mantis_i2c_write (1): Data<W[0]>=[0x40]
Oct 30 15:42:47 testbox kernel: [17658745.176000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_frontend_init (1): found LNBP21 SEC device
Oct 30 15:42:47 testbox kernel: [17658745.196000] DVB: registering frontend 1 (STB0899 Multistandard)...
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_uart_init (1): Initializing .. 
Oct 30 15:42:47 testbox kernel: [17658745.196000] ACPI: PCI Interrupt 0000:02:0d.0[A] -> GSI 21 (level, low) -> IRQ 19
Oct 30 15:42:47 testbox kernel: [17658745.196000] 
Oct 30 15:42:47 testbox kernel: [17658745.196000] gpif status: 6000  irqcfg: 0002
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_set_direction (2): TS direction setup
Oct 30 15:42:47 testbox kernel: [17658745.196000] found a VP-1034 PCI DVB-S/DSS device on (02:0d.0),
Oct 30 15:42:47 testbox kernel: [17658745.196000]     Mantis Rev 1 [1822:0014], irq: 19, latency: 64
Oct 30 15:42:47 testbox kernel: [17658745.196000]     memory: 0xe3bfd000, mmio: 0xe5a34000
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_i2c_init (2): Initializing I2C ..
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_i2c_init (2): [0x04000000/00000001]
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_i2c_write (2): Address=[0x50]
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_i2c_write (2): Data<W[0]>=[0x08]
Oct 30 15:42:47 testbox kernel: [17658745.196000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.196000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.216000] mantis_i2c_read (2): Address=[0x50]
Oct 30 15:42:47 testbox kernel: [17658745.216000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.216000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.232000] mantis_i2c_read (2): Data<R[0]>=[0x00]
Oct 30 15:42:47 testbox kernel: [17658745.244000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.244000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.256000] mantis_i2c_read (2): Data<R[1]>=[0x08]
Oct 30 15:42:47 testbox kernel: [17658745.268000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.268000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.280000] mantis_i2c_read (2): Data<R[2]>=[0xca]
Oct 30 15:42:47 testbox kernel: [17658745.292000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.292000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.304000] mantis_i2c_read (2): Data<R[3]>=[0x19]
Oct 30 15:42:47 testbox kernel: [17658745.316000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.316000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.328000] mantis_i2c_read (2): Data<R[4]>=[0x54]
Oct 30 15:42:47 testbox kernel: [17658745.340000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.340000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.352000] mantis_i2c_read (2): Data<R[5]>=[0xdf]
Oct 30 15:42:47 testbox kernel: [17658745.368000]     MAC Address=[00:08:ca:19:54:df]
Oct 30 15:42:47 testbox kernel: [17658745.368000] mantis_dma_init (2): Mantis DMA init
Oct 30 15:42:47 testbox kernel: [17658745.372000]     DMA=0xb610000 cpu=0xcb610000 size=65536
Oct 30 15:42:47 testbox kernel: [17658745.372000]     RISC=0x1aa84000 cpu=0xdaa84000 size=1000
Oct 30 15:42:47 testbox kernel: [17658745.372000] mantis_calc_lines (2): Mantis RISC block bytes=[4096], line bytes=[2048], line count=[32]
Oct 30 15:42:47 testbox kernel: [17658745.372000] mantis_dvb_init (2): dvb_register_adapter
Oct 30 15:42:47 testbox kernel: [17658745.372000] DVB: registering new adapter (Mantis dvb adapter).
Oct 30 15:42:47 testbox kernel: [17658745.372000] mantis_dvb_init (2): dvb_dmx_init
Oct 30 15:42:47 testbox kernel: [17658745.372000] mantis_dvb_init (2): dvb_dmxdev_init
Oct 30 15:42:47 testbox kernel: [17658745.372000] mantis_frontend_init (2): Mantis frontend Init
Oct 30 15:42:47 testbox kernel: [17658745.372000] mantis_fe_powerup (2): Frontend Power ON
Oct 30 15:42:47 testbox kernel: [17658745.584000] mantis_frontend_reset (2): Frontend Reset
Oct 30 15:42:47 testbox kernel: [17658745.912000] mantis_frontend_init (2): Device ID=14
Oct 30 15:42:47 testbox kernel: [17658745.912000] mantis_frontend_init (2): Probing for MB86A16 (DVB-S/DSS)
Oct 30 15:42:47 testbox kernel: [17658745.912000] mantis_i2c_write (2): Address=[0x08]
Oct 30 15:42:47 testbox kernel: [17658745.912000] mantis_i2c_write (2): Data<W[0]>=[0x7f]
Oct 30 15:42:47 testbox kernel: [17658745.912000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.912000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.932000] mantis_i2c_read (2): Address=[0x08]
Oct 30 15:42:47 testbox kernel: [17658745.932000] mantis_pci_irq (0): Not ours !
Oct 30 15:42:47 testbox kernel: [17658745.932000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:42:47 testbox kernel: [17658745.948000] mantis_i2c_read (2): Data<R[0]>=[0xfe]
Oct 30 15:42:47 testbox kernel: [17658745.956000] mantis_frontend_init (2): found MB86A16 DVB-S/DSS frontend @0x08
Oct 30 15:42:47 testbox kernel: [17658745.956000] DVB: registering frontend 2 (Fujitsu MB86A16 DVB-S)...
Oct 30 15:42:47 testbox kernel: [17658745.960000] mantis_uart_init (2): Initializing .. 
Oct 30 15:43:19 testbox kernel: [17658777.376000] dvb_frontend_ioctl: DVBFE_GET_INFO
Oct 30 15:43:19 testbox kernel: [17658777.376000] stb0899_get_info: Querying DVB-S info
Oct 30 15:43:19 testbox kernel: [17658777.376000] mantis_i2c_write (1): Address=[0x08]
Oct 30 15:43:19 testbox kernel: [17658777.376000] mantis_i2c_write (1): Data<W[0]>=[0x44]
Oct 30 15:43:19 testbox kernel: [17658777.376000] === Interrupts[4000001/0001]=2 [* I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_dvb_start_feed (1): Mantis DVB Start feed
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_dvb_start_feed (1): mantis start feed, feeds=1
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_dvb_start_feed (1): mantis start feed & dma
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis start feed & dma
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_dma_start (1): Mantis Start DMA engine
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): Mantis create RISC program
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): risc len lines 32, bytes per line 2048
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[0]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[1]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[2]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[3]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[4]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[5]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[6]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[7]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[8]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[9]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[10]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[11]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[12]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[13]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[14]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[15]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[16]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[17]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[18]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[19]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[20]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[21]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[22]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[23]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[24]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[25]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[26]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[27]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[28]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[29]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[30]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_risc_program (1): RISC PROG line=[31]
Oct 30 15:43:19 testbox kernel: [17658777.456000] === Interrupts[fc000002/0003]=7 [<3>mantis_dvb_start_feed (1): Mantis DVB Start feed
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_dvb_start_feed (1): mantis start feed, feeds=2
Oct 30 15:43:19 testbox kernel: [17658777.456000] stb0899_read_signal_strength: Delivery system - DVB-S
Oct 30 15:43:19 testbox kernel: [17658777.456000] stb0899_read_signal_strength: Delivery system - DSS
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:19 testbox kernel: [17658777.456000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:19 testbox kernel: [17658777.456000] * DMA enabl ** I2C R-ACK ** INT RISCI *] ===
Oct 30 15:43:19 testbox kernel: [17658777.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[0] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[1] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[2] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[3] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[4] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[5] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[6] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[7] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[8] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[9] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[10] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[11] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[12] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[13] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.460000] mantis_dma_xfer (1): last block=[14] finished block=[15]
Oct 30 15:43:19 testbox kernel: [17658777.472000] mantis_i2c_write (1): Data<W[1]>=[0x2e]
Oct 30 15:43:19 testbox kernel: [17658777.472000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.524000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:19 testbox kernel: [17658777.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.576000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:19 testbox kernel: [17658777.584000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.636000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:19 testbox kernel: [17658777.644000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:19 testbox kernel: [17658777.644000] stb0899_read_signal_strength: Reading from table -- 
Oct 30 15:43:19 testbox kernel: [17658777.644000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:19 testbox kernel: [17658777.644000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:19 testbox kernel: [17658777.644000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.696000] mantis_i2c_write (1): Data<W[1]>=[0x3a]
Oct 30 15:43:19 testbox kernel: [17658777.696000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.748000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:19 testbox kernel: [17658777.748000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.800000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:19 testbox kernel: [17658777.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.860000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:19 testbox kernel: [17658777.868000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:19 testbox kernel: [17658777.868000] stb0899_init: Initializing STB0899 ... 
Oct 30 15:43:19 testbox kernel: [17658777.868000] stb0899_write_reg: Norm Write buf=[f0 a0 26 00]
Oct 30 15:43:19 testbox kernel: [17658777.868000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:19 testbox kernel: [17658777.868000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:19 testbox kernel: [17658777.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.920000] mantis_i2c_write (1): Data<W[1]>=[0xa0]
Oct 30 15:43:19 testbox kernel: [17658777.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658777.972000] mantis_i2c_write (1): Data<W[2]>=[0x26]
Oct 30 15:43:19 testbox kernel: [17658777.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658778.024000] stb0899_write_reg: Norm Write buf=[f0 a1 80 01]
Oct 30 15:43:19 testbox kernel: [17658778.024000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:19 testbox kernel: [17658778.024000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:19 testbox kernel: [17658778.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:19 testbox kernel: [17658778.076000] mantis_i2c_write (1): Data<W[1]>=[0xa1]
Oct 30 15:43:19 testbox kernel: [17658778.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.128000] mantis_i2c_write (1): Data<W[2]>=[0x80]
Oct 30 15:43:20 testbox kernel: [17658778.128000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.180000] stb0899_write_reg: Norm Write buf=[f0 a4 04 02]
Oct 30 15:43:20 testbox kernel: [17658778.180000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:20 testbox kernel: [17658778.180000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:20 testbox kernel: [17658778.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.232000] mantis_i2c_write (1): Data<W[1]>=[0xa4]
Oct 30 15:43:20 testbox kernel: [17658778.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.284000] mantis_i2c_write (1): Data<W[2]>=[0x04]
Oct 30 15:43:20 testbox kernel: [17658778.284000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.336000] stb0899_write_reg: Norm Write buf=[f0 a5 20 03]
Oct 30 15:43:20 testbox kernel: [17658778.336000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:20 testbox kernel: [17658778.336000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:20 testbox kernel: [17658778.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.388000] mantis_i2c_write (1): Data<W[1]>=[0xa5]
Oct 30 15:43:20 testbox kernel: [17658778.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.440000] mantis_i2c_write (1): Data<W[2]>=[0x20]
Oct 30 15:43:20 testbox kernel: [17658778.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.492000] stb0899_write_reg: Norm Write buf=[f0 a6 00 04]
Oct 30 15:43:20 testbox kernel: [17658778.492000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:20 testbox kernel: [17658778.492000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:20 testbox kernel: [17658778.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.544000] mantis_i2c_write (1): Data<W[1]>=[0xa6]
Oct 30 15:43:20 testbox kernel: [17658778.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.596000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:20 testbox kernel: [17658778.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.648000] stb0899_write_reg: Norm Write buf=[f0 a7 00 05]
Oct 30 15:43:20 testbox kernel: [17658778.648000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:20 testbox kernel: [17658778.648000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:20 testbox kernel: [17658778.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.700000] mantis_i2c_write (1): Data<W[1]>=[0xa7]
Oct 30 15:43:20 testbox kernel: [17658778.700000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.752000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:20 testbox kernel: [17658778.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.804000] stb0899_write_reg: Norm Write buf=[f0 a9 99 06]
Oct 30 15:43:20 testbox kernel: [17658778.804000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:20 testbox kernel: [17658778.804000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:20 testbox kernel: [17658778.804000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.856000] mantis_i2c_write (1): Data<W[1]>=[0xa9]
Oct 30 15:43:20 testbox kernel: [17658778.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.908000] mantis_i2c_write (1): Data<W[2]>=[0x99]
Oct 30 15:43:20 testbox kernel: [17658778.908000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658778.960000] stb0899_write_reg: Norm Write buf=[f0 aa 85 07]
Oct 30 15:43:20 testbox kernel: [17658778.960000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:20 testbox kernel: [17658778.960000] mantis_i2c_write (1): Data<W[0]>=[0xf0]
Oct 30 15:43:20 testbox kernel: [17658778.960000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658779.012000] mantis_i2c_write (1): Data<W[1]>=[0xaa]
Oct 30 15:43:20 testbox kernel: [17658779.012000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:20 testbox kernel: [17658779.064000] mantis_i2c_write (1): Data<W[2]>=[0x85]
Oct 30 15:43:20 testbox kernel: [17658779.064000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.116000] stb0899_write_reg: Norm Write buf=[f1 10 11 08]
Oct 30 15:43:21 testbox kernel: [17658779.116000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658779.116000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658779.116000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.168000] mantis_i2c_write (1): Data<W[1]>=[0x10]
Oct 30 15:43:21 testbox kernel: [17658779.168000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.220000] mantis_i2c_write (1): Data<W[2]>=[0x11]
Oct 30 15:43:21 testbox kernel: [17658779.220000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.272000] stb0899_write_reg: Norm Write buf=[f1 11 0a 09]
Oct 30 15:43:21 testbox kernel: [17658779.272000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658779.272000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658779.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.324000] mantis_i2c_write (1): Data<W[1]>=[0x11]
Oct 30 15:43:21 testbox kernel: [17658779.324000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.376000] mantis_i2c_write (1): Data<W[2]>=[0x0a]
Oct 30 15:43:21 testbox kernel: [17658779.376000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.428000] stb0899_write_reg: Norm Write buf=[f1 12 05 0a]
Oct 30 15:43:21 testbox kernel: [17658779.428000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658779.428000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658779.428000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.480000] mantis_i2c_write (1): Data<W[1]>=[0x12]
Oct 30 15:43:21 testbox kernel: [17658779.480000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.532000] mantis_i2c_write (1): Data<W[2]>=[0x05]
Oct 30 15:43:21 testbox kernel: [17658779.532000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.584000] stb0899_write_reg: Norm Write buf=[f1 13 00 0b]
Oct 30 15:43:21 testbox kernel: [17658779.584000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658779.584000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658779.584000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.636000] mantis_i2c_write (1): Data<W[1]>=[0x13]
Oct 30 15:43:21 testbox kernel: [17658779.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.688000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:21 testbox kernel: [17658779.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.740000] stb0899_write_reg: Norm Write buf=[f1 14 00 0c]
Oct 30 15:43:21 testbox kernel: [17658779.740000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658779.740000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658779.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.792000] mantis_i2c_write (1): Data<W[1]>=[0x14]
Oct 30 15:43:21 testbox kernel: [17658779.792000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.844000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:21 testbox kernel: [17658779.844000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.896000] stb0899_write_reg: Norm Write buf=[f1 1c 00 0d]
Oct 30 15:43:21 testbox kernel: [17658779.896000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658779.896000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658779.896000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658779.948000] mantis_i2c_write (1): Data<W[1]>=[0x1c]
Oct 30 15:43:21 testbox kernel: [17658779.948000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658780.000000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:21 testbox kernel: [17658780.000000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658780.052000] stb0899_write_reg: Norm Write buf=[f1 1d 00 0e]
Oct 30 15:43:21 testbox kernel: [17658780.052000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:21 testbox kernel: [17658780.052000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:21 testbox kernel: [17658780.052000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:21 testbox kernel: [17658780.104000] mantis_i2c_write (1): Data<W[1]>=[0x1d]
Oct 30 15:43:21 testbox kernel: [17658780.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.156000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:22 testbox kernel: [17658780.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.208000] stb0899_write_reg: Norm Write buf=[f1 24 f3 0f]
Oct 30 15:43:22 testbox kernel: [17658780.208000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:22 testbox kernel: [17658780.208000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:22 testbox kernel: [17658780.208000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.260000] mantis_i2c_write (1): Data<W[1]>=[0x24]
Oct 30 15:43:22 testbox kernel: [17658780.260000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.312000] mantis_i2c_write (1): Data<W[2]>=[0xf3]
Oct 30 15:43:22 testbox kernel: [17658780.312000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.364000] stb0899_write_reg: Norm Write buf=[f1 25 fc 10]
Oct 30 15:43:22 testbox kernel: [17658780.364000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:22 testbox kernel: [17658780.364000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:22 testbox kernel: [17658780.364000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.416000] mantis_i2c_write (1): Data<W[1]>=[0x25]
Oct 30 15:43:22 testbox kernel: [17658780.416000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.468000] mantis_i2c_write (1): Data<W[2]>=[0xfc]
Oct 30 15:43:22 testbox kernel: [17658780.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.520000] stb0899_write_reg: Norm Write buf=[f1 26 ff 11]
Oct 30 15:43:22 testbox kernel: [17658780.520000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:22 testbox kernel: [17658780.520000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:22 testbox kernel: [17658780.520000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.572000] mantis_i2c_write (1): Data<W[1]>=[0x26]
Oct 30 15:43:22 testbox kernel: [17658780.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.624000] mantis_i2c_write (1): Data<W[2]>=[0xff]
Oct 30 15:43:22 testbox kernel: [17658780.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.676000] stb0899_write_reg: Norm Write buf=[f1 27 ff 12]
Oct 30 15:43:22 testbox kernel: [17658780.676000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:22 testbox kernel: [17658780.676000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:22 testbox kernel: [17658780.676000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.728000] mantis_i2c_write (1): Data<W[1]>=[0x27]
Oct 30 15:43:22 testbox kernel: [17658780.728000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.780000] mantis_i2c_write (1): Data<W[2]>=[0xff]
Oct 30 15:43:22 testbox kernel: [17658780.780000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.832000] stb0899_write_reg: Norm Write buf=[f1 29 88 13]
Oct 30 15:43:22 testbox kernel: [17658780.832000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:22 testbox kernel: [17658780.832000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:22 testbox kernel: [17658780.832000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.884000] mantis_i2c_write (1): Data<W[1]>=[0x29]
Oct 30 15:43:22 testbox kernel: [17658780.884000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.936000] mantis_i2c_write (1): Data<W[2]>=[0x88]
Oct 30 15:43:22 testbox kernel: [17658780.936000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658780.988000] stb0899_write_reg: Norm Write buf=[f1 2a 5e 14]
Oct 30 15:43:22 testbox kernel: [17658780.988000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:22 testbox kernel: [17658780.988000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:22 testbox kernel: [17658780.988000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658781.040000] mantis_i2c_write (1): Data<W[1]>=[0x2a]
Oct 30 15:43:22 testbox kernel: [17658781.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:22 testbox kernel: [17658781.092000] mantis_i2c_write (1): Data<W[2]>=[0x5e]
Oct 30 15:43:22 testbox kernel: [17658781.092000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.144000] stb0899_write_reg: Norm Write buf=[f1 40 82 15]
Oct 30 15:43:23 testbox kernel: [17658781.144000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658781.144000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658781.144000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.196000] mantis_i2c_write (1): Data<W[1]>=[0x40]
Oct 30 15:43:23 testbox kernel: [17658781.196000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.248000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:23 testbox kernel: [17658781.248000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.300000] stb0899_write_reg: Norm Write buf=[f1 41 82 16]
Oct 30 15:43:23 testbox kernel: [17658781.300000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658781.300000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658781.300000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.352000] mantis_i2c_write (1): Data<W[1]>=[0x41]
Oct 30 15:43:23 testbox kernel: [17658781.352000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.404000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:23 testbox kernel: [17658781.404000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.456000] stb0899_write_reg: Norm Write buf=[f1 42 82 17]
Oct 30 15:43:23 testbox kernel: [17658781.456000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658781.456000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658781.456000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.508000] mantis_i2c_write (1): Data<W[1]>=[0x42]
Oct 30 15:43:23 testbox kernel: [17658781.508000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.560000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:23 testbox kernel: [17658781.560000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.612000] stb0899_write_reg: Norm Write buf=[f1 43 82 18]
Oct 30 15:43:23 testbox kernel: [17658781.612000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658781.612000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658781.612000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.664000] mantis_i2c_write (1): Data<W[1]>=[0x43]
Oct 30 15:43:23 testbox kernel: [17658781.664000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.716000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:23 testbox kernel: [17658781.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.768000] stb0899_write_reg: Norm Write buf=[f1 44 82 19]
Oct 30 15:43:23 testbox kernel: [17658781.768000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658781.768000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658781.768000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.820000] mantis_i2c_write (1): Data<W[1]>=[0x44]
Oct 30 15:43:23 testbox kernel: [17658781.820000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.872000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:23 testbox kernel: [17658781.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.924000] stb0899_write_reg: Norm Write buf=[f1 45 82 1a]
Oct 30 15:43:23 testbox kernel: [17658781.924000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658781.924000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658781.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658781.976000] mantis_i2c_write (1): Data<W[1]>=[0x45]
Oct 30 15:43:23 testbox kernel: [17658781.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658782.028000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:23 testbox kernel: [17658782.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:23 testbox kernel: [17658782.080000] stb0899_write_reg: Norm Write buf=[f1 46 82 1b]
Oct 30 15:43:23 testbox kernel: [17658782.080000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:23 testbox kernel: [17658782.080000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:23 testbox kernel: [17658782.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.132000] mantis_i2c_write (1): Data<W[1]>=[0x46]
Oct 30 15:43:24 testbox kernel: [17658782.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.184000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:24 testbox kernel: [17658782.184000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.236000] stb0899_write_reg: Norm Write buf=[f1 47 82 1c]
Oct 30 15:43:24 testbox kernel: [17658782.236000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:24 testbox kernel: [17658782.236000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:24 testbox kernel: [17658782.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.288000] mantis_i2c_write (1): Data<W[1]>=[0x47]
Oct 30 15:43:24 testbox kernel: [17658782.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.340000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:24 testbox kernel: [17658782.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.392000] stb0899_write_reg: Norm Write buf=[f1 48 82 1d]
Oct 30 15:43:24 testbox kernel: [17658782.392000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:24 testbox kernel: [17658782.392000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:24 testbox kernel: [17658782.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.444000] mantis_i2c_write (1): Data<W[1]>=[0x48]
Oct 30 15:43:24 testbox kernel: [17658782.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.496000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:24 testbox kernel: [17658782.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.548000] stb0899_write_reg: Norm Write buf=[f1 49 82 1e]
Oct 30 15:43:24 testbox kernel: [17658782.548000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:24 testbox kernel: [17658782.548000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:24 testbox kernel: [17658782.548000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.600000] mantis_i2c_write (1): Data<W[1]>=[0x49]
Oct 30 15:43:24 testbox kernel: [17658782.600000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.652000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:24 testbox kernel: [17658782.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.704000] stb0899_write_reg: Norm Write buf=[f1 4a 82 1f]
Oct 30 15:43:24 testbox kernel: [17658782.704000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:24 testbox kernel: [17658782.704000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:24 testbox kernel: [17658782.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.756000] mantis_i2c_write (1): Data<W[1]>=[0x4a]
Oct 30 15:43:24 testbox kernel: [17658782.756000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.808000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:24 testbox kernel: [17658782.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.860000] stb0899_write_reg: Norm Write buf=[f1 4b 82 20]
Oct 30 15:43:24 testbox kernel: [17658782.860000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:24 testbox kernel: [17658782.860000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:24 testbox kernel: [17658782.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.912000] mantis_i2c_write (1): Data<W[1]>=[0x4b]
Oct 30 15:43:24 testbox kernel: [17658782.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658782.964000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:24 testbox kernel: [17658782.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658783.016000] stb0899_write_reg: Norm Write buf=[f1 4c 82 21]
Oct 30 15:43:24 testbox kernel: [17658783.016000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:24 testbox kernel: [17658783.016000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:24 testbox kernel: [17658783.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:24 testbox kernel: [17658783.068000] mantis_i2c_write (1): Data<W[1]>=[0x4c]
Oct 30 15:43:24 testbox kernel: [17658783.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.120000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658783.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.172000] stb0899_write_reg: Norm Write buf=[f1 4d 82 22]
Oct 30 15:43:25 testbox kernel: [17658783.172000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:25 testbox kernel: [17658783.172000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:25 testbox kernel: [17658783.172000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.224000] mantis_i2c_write (1): Data<W[1]>=[0x4d]
Oct 30 15:43:25 testbox kernel: [17658783.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.276000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658783.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.328000] stb0899_write_reg: Norm Write buf=[f1 4e 82 23]
Oct 30 15:43:25 testbox kernel: [17658783.328000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:25 testbox kernel: [17658783.328000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:25 testbox kernel: [17658783.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.380000] mantis_i2c_write (1): Data<W[1]>=[0x4e]
Oct 30 15:43:25 testbox kernel: [17658783.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.432000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658783.432000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.484000] stb0899_write_reg: Norm Write buf=[f1 4f 82 24]
Oct 30 15:43:25 testbox kernel: [17658783.484000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:25 testbox kernel: [17658783.484000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:25 testbox kernel: [17658783.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.536000] mantis_i2c_write (1): Data<W[1]>=[0x4f]
Oct 30 15:43:25 testbox kernel: [17658783.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.588000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658783.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.640000] stb0899_write_reg: Norm Write buf=[f1 50 82 25]
Oct 30 15:43:25 testbox kernel: [17658783.640000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:25 testbox kernel: [17658783.640000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:25 testbox kernel: [17658783.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.692000] mantis_i2c_write (1): Data<W[1]>=[0x50]
Oct 30 15:43:25 testbox kernel: [17658783.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.744000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658783.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.796000] stb0899_write_reg: Norm Write buf=[f1 51 82 26]
Oct 30 15:43:25 testbox kernel: [17658783.796000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:25 testbox kernel: [17658783.796000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:25 testbox kernel: [17658783.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.848000] mantis_i2c_write (1): Data<W[1]>=[0x51]
Oct 30 15:43:25 testbox kernel: [17658783.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.900000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658783.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658783.952000] stb0899_write_reg: Norm Write buf=[f1 52 82 27]
Oct 30 15:43:25 testbox kernel: [17658783.952000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:25 testbox kernel: [17658783.952000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:25 testbox kernel: [17658783.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658784.004000] mantis_i2c_write (1): Data<W[1]>=[0x52]
Oct 30 15:43:25 testbox kernel: [17658784.004000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:25 testbox kernel: [17658784.056000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:25 testbox kernel: [17658784.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.108000] stb0899_write_reg: Norm Write buf=[f1 53 82 28]
Oct 30 15:43:26 testbox kernel: [17658784.108000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658784.108000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658784.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.160000] mantis_i2c_write (1): Data<W[1]>=[0x53]
Oct 30 15:43:26 testbox kernel: [17658784.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.212000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:26 testbox kernel: [17658784.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.264000] stb0899_write_reg: Norm Write buf=[f1 54 82 29]
Oct 30 15:43:26 testbox kernel: [17658784.264000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658784.264000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658784.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.316000] mantis_i2c_write (1): Data<W[1]>=[0x54]
Oct 30 15:43:26 testbox kernel: [17658784.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.368000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:26 testbox kernel: [17658784.368000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.420000] stb0899_write_reg: Norm Write buf=[f1 55 b8 2a]
Oct 30 15:43:26 testbox kernel: [17658784.420000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658784.420000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658784.420000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.472000] mantis_i2c_write (1): Data<W[1]>=[0x55]
Oct 30 15:43:26 testbox kernel: [17658784.472000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.524000] mantis_i2c_write (1): Data<W[2]>=[0xb8]
Oct 30 15:43:26 testbox kernel: [17658784.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.576000] stb0899_write_reg: Norm Write buf=[f1 56 ba 2b]
Oct 30 15:43:26 testbox kernel: [17658784.576000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658784.576000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658784.576000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.628000] mantis_i2c_write (1): Data<W[1]>=[0x56]
Oct 30 15:43:26 testbox kernel: [17658784.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.680000] mantis_i2c_write (1): Data<W[2]>=[0xba]
Oct 30 15:43:26 testbox kernel: [17658784.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.732000] stb0899_write_reg: Norm Write buf=[f1 57 1c 2c]
Oct 30 15:43:26 testbox kernel: [17658784.732000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658784.732000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658784.732000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.784000] mantis_i2c_write (1): Data<W[1]>=[0x57]
Oct 30 15:43:26 testbox kernel: [17658784.784000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.836000] mantis_i2c_write (1): Data<W[2]>=[0x1c]
Oct 30 15:43:26 testbox kernel: [17658784.836000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.888000] stb0899_write_reg: Norm Write buf=[f1 58 82 2d]
Oct 30 15:43:26 testbox kernel: [17658784.888000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658784.888000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658784.888000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.940000] mantis_i2c_write (1): Data<W[1]>=[0x58]
Oct 30 15:43:26 testbox kernel: [17658784.940000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658784.992000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:26 testbox kernel: [17658784.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658785.044000] stb0899_write_reg: Norm Write buf=[f1 59 91 2e]
Oct 30 15:43:26 testbox kernel: [17658785.044000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:26 testbox kernel: [17658785.044000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:26 testbox kernel: [17658785.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:26 testbox kernel: [17658785.096000] mantis_i2c_write (1): Data<W[1]>=[0x59]
Oct 30 15:43:26 testbox kernel: [17658785.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.148000] mantis_i2c_write (1): Data<W[2]>=[0x91]
Oct 30 15:43:27 testbox kernel: [17658785.148000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.200000] stb0899_write_reg: Norm Write buf=[f1 5a 82 2f]
Oct 30 15:43:27 testbox kernel: [17658785.200000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:27 testbox kernel: [17658785.200000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:27 testbox kernel: [17658785.200000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.252000] mantis_i2c_write (1): Data<W[1]>=[0x5a]
Oct 30 15:43:27 testbox kernel: [17658785.252000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.304000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:27 testbox kernel: [17658785.304000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.356000] stb0899_write_reg: Norm Write buf=[f1 5b 7e 30]
Oct 30 15:43:27 testbox kernel: [17658785.356000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:27 testbox kernel: [17658785.356000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:27 testbox kernel: [17658785.356000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.408000] mantis_i2c_write (1): Data<W[1]>=[0x5b]
Oct 30 15:43:27 testbox kernel: [17658785.408000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.460000] mantis_i2c_write (1): Data<W[2]>=[0x7e]
Oct 30 15:43:27 testbox kernel: [17658785.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.512000] stb0899_write_reg: Norm Write buf=[f1 5c 82 31]
Oct 30 15:43:27 testbox kernel: [17658785.512000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:27 testbox kernel: [17658785.512000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:27 testbox kernel: [17658785.512000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.564000] mantis_i2c_write (1): Data<W[1]>=[0x5c]
Oct 30 15:43:27 testbox kernel: [17658785.564000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.616000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:27 testbox kernel: [17658785.616000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.668000] stb0899_write_reg: Norm Write buf=[f1 5d 82 32]
Oct 30 15:43:27 testbox kernel: [17658785.668000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:27 testbox kernel: [17658785.668000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:27 testbox kernel: [17658785.668000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.720000] mantis_i2c_write (1): Data<W[1]>=[0x5d]
Oct 30 15:43:27 testbox kernel: [17658785.720000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.772000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:27 testbox kernel: [17658785.772000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.824000] stb0899_write_reg: Norm Write buf=[f1 5e 82 33]
Oct 30 15:43:27 testbox kernel: [17658785.824000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:27 testbox kernel: [17658785.824000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:27 testbox kernel: [17658785.824000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.876000] mantis_i2c_write (1): Data<W[1]>=[0x5e]
Oct 30 15:43:27 testbox kernel: [17658785.876000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.928000] mantis_i2c_write (1): Data<W[2]>=[0x82]
Oct 30 15:43:27 testbox kernel: [17658785.928000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658785.980000] stb0899_write_reg: Norm Write buf=[f1 5f 20 34]
Oct 30 15:43:27 testbox kernel: [17658785.980000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:27 testbox kernel: [17658785.980000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:27 testbox kernel: [17658785.980000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658786.032000] mantis_i2c_write (1): Data<W[1]>=[0x5f]
Oct 30 15:43:27 testbox kernel: [17658786.032000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:27 testbox kernel: [17658786.084000] mantis_i2c_write (1): Data<W[2]>=[0x20]
Oct 30 15:43:27 testbox kernel: [17658786.084000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.136000] stb0899_write_reg: Norm Write buf=[f1 b3 15 35]
Oct 30 15:43:28 testbox kernel: [17658786.136000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658786.136000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:28 testbox kernel: [17658786.136000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.188000] mantis_i2c_write (1): Data<W[1]>=[0xb3]
Oct 30 15:43:28 testbox kernel: [17658786.188000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.240000] mantis_i2c_write (1): Data<W[2]>=[0x15]
Oct 30 15:43:28 testbox kernel: [17658786.240000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.292000] stb0899_write_reg: Norm Write buf=[f1 b6 00 36]
Oct 30 15:43:28 testbox kernel: [17658786.292000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658786.292000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:28 testbox kernel: [17658786.292000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.344000] mantis_i2c_write (1): Data<W[1]>=[0xb6]
Oct 30 15:43:28 testbox kernel: [17658786.344000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.396000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:28 testbox kernel: [17658786.396000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.448000] stb0899_write_reg: Norm Write buf=[f1 b7 00 37]
Oct 30 15:43:28 testbox kernel: [17658786.448000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658786.448000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:28 testbox kernel: [17658786.448000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.500000] mantis_i2c_write (1): Data<W[1]>=[0xb7]
Oct 30 15:43:28 testbox kernel: [17658786.500000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.552000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:28 testbox kernel: [17658786.552000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.604000] stb0899_write_reg: Norm Write buf=[f1 b8 00 38]
Oct 30 15:43:28 testbox kernel: [17658786.604000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658786.604000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:28 testbox kernel: [17658786.604000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.656000] mantis_i2c_write (1): Data<W[1]>=[0xb8]
Oct 30 15:43:28 testbox kernel: [17658786.656000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.708000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:28 testbox kernel: [17658786.708000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.760000] stb0899_write_reg: Norm Write buf=[f1 c2 00 39]
Oct 30 15:43:28 testbox kernel: [17658786.760000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658786.760000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:28 testbox kernel: [17658786.760000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.812000] mantis_i2c_write (1): Data<W[1]>=[0xc2]
Oct 30 15:43:28 testbox kernel: [17658786.812000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.864000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:28 testbox kernel: [17658786.864000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.916000] stb0899_write_reg: Norm Write buf=[f1 c3 00 3a]
Oct 30 15:43:28 testbox kernel: [17658786.916000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658786.916000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:28 testbox kernel: [17658786.916000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658786.968000] mantis_i2c_write (1): Data<W[1]>=[0xc3]
Oct 30 15:43:28 testbox kernel: [17658786.968000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658787.020000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:28 testbox kernel: [17658787.020000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:28 testbox kernel: [17658787.072000] stb0899_write_reg: Norm Write buf=[f2 01 0a 3b]
Oct 30 15:43:28 testbox kernel: [17658787.072000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:28 testbox kernel: [17658787.072000] mantis_i2c_write (1): Data<W[0]>=[0xf2]
Oct 30 15:43:28 testbox kernel: [17658787.072000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.124000] mantis_i2c_write (1): Data<W[1]>=[0x01]
Oct 30 15:43:29 testbox kernel: [17658787.124000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.176000] mantis_i2c_write (1): Data<W[2]>=[0x0a]
Oct 30 15:43:29 testbox kernel: [17658787.176000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.228000] stb0899_write_reg: Norm Write buf=[f4 0e 00 3c]
Oct 30 15:43:29 testbox kernel: [17658787.228000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:29 testbox kernel: [17658787.228000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:29 testbox kernel: [17658787.228000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.280000] mantis_i2c_write (1): Data<W[1]>=[0x0e]
Oct 30 15:43:29 testbox kernel: [17658787.280000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.332000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:29 testbox kernel: [17658787.332000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.384000] stb0899_write_reg: Norm Write buf=[f4 10 c9 3d]
Oct 30 15:43:29 testbox kernel: [17658787.384000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:29 testbox kernel: [17658787.384000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:29 testbox kernel: [17658787.384000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.436000] mantis_i2c_write (1): Data<W[1]>=[0x10]
Oct 30 15:43:29 testbox kernel: [17658787.436000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.488000] mantis_i2c_write (1): Data<W[2]>=[0xc9]
Oct 30 15:43:29 testbox kernel: [17658787.488000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.540000] stb0899_write_reg: Norm Write buf=[f4 12 47 3e]
Oct 30 15:43:29 testbox kernel: [17658787.540000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:29 testbox kernel: [17658787.540000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:29 testbox kernel: [17658787.540000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.592000] mantis_i2c_write (1): Data<W[1]>=[0x12]
Oct 30 15:43:29 testbox kernel: [17658787.592000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.644000] mantis_i2c_write (1): Data<W[2]>=[0x47]
Oct 30 15:43:29 testbox kernel: [17658787.644000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.696000] stb0899_write_reg: Norm Write buf=[f4 13 10 3f]
Oct 30 15:43:29 testbox kernel: [17658787.696000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:29 testbox kernel: [17658787.696000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:29 testbox kernel: [17658787.696000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.748000] mantis_i2c_write (1): Data<W[1]>=[0x13]
Oct 30 15:43:29 testbox kernel: [17658787.748000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.800000] mantis_i2c_write (1): Data<W[2]>=[0x10]
Oct 30 15:43:29 testbox kernel: [17658787.800000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.852000] stb0899_write_reg: Norm Write buf=[f4 17 46 40]
Oct 30 15:43:29 testbox kernel: [17658787.852000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:29 testbox kernel: [17658787.852000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:29 testbox kernel: [17658787.852000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.904000] mantis_i2c_write (1): Data<W[1]>=[0x17]
Oct 30 15:43:29 testbox kernel: [17658787.904000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658787.956000] mantis_i2c_write (1): Data<W[2]>=[0x46]
Oct 30 15:43:29 testbox kernel: [17658787.956000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658788.008000] stb0899_write_reg: Norm Write buf=[f4 18 4e 41]
Oct 30 15:43:29 testbox kernel: [17658788.008000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:29 testbox kernel: [17658788.008000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:29 testbox kernel: [17658788.008000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:29 testbox kernel: [17658788.060000] mantis_i2c_write (1): Data<W[1]>=[0x18]
Oct 30 15:43:29 testbox kernel: [17658788.060000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.112000] mantis_i2c_write (1): Data<W[2]>=[0x4e]
Oct 30 15:43:30 testbox kernel: [17658788.112000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.164000] stb0899_write_reg: Norm Write buf=[f4 19 36 42]
Oct 30 15:43:30 testbox kernel: [17658788.164000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658788.164000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658788.164000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.216000] mantis_i2c_write (1): Data<W[1]>=[0x19]
Oct 30 15:43:30 testbox kernel: [17658788.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.268000] mantis_i2c_write (1): Data<W[2]>=[0x36]
Oct 30 15:43:30 testbox kernel: [17658788.268000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.320000] stb0899_write_reg: Norm Write buf=[f4 1a 84 43]
Oct 30 15:43:30 testbox kernel: [17658788.320000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658788.320000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658788.320000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.372000] mantis_i2c_write (1): Data<W[1]>=[0x1a]
Oct 30 15:43:30 testbox kernel: [17658788.372000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.424000] mantis_i2c_write (1): Data<W[2]>=[0x84]
Oct 30 15:43:30 testbox kernel: [17658788.424000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.476000] stb0899_write_reg: Norm Write buf=[f4 1b ee 44]
Oct 30 15:43:30 testbox kernel: [17658788.476000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658788.476000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658788.476000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.528000] mantis_i2c_write (1): Data<W[1]>=[0x1b]
Oct 30 15:43:30 testbox kernel: [17658788.528000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.580000] mantis_i2c_write (1): Data<W[2]>=[0xee]
Oct 30 15:43:30 testbox kernel: [17658788.580000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.632000] stb0899_write_reg: Norm Write buf=[f4 1c a8 45]
Oct 30 15:43:30 testbox kernel: [17658788.632000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658788.632000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658788.632000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.684000] mantis_i2c_write (1): Data<W[1]>=[0x1c]
Oct 30 15:43:30 testbox kernel: [17658788.684000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.736000] mantis_i2c_write (1): Data<W[2]>=[0xa8]
Oct 30 15:43:30 testbox kernel: [17658788.736000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.788000] stb0899_write_reg: Norm Write buf=[f4 1d 9c 46]
Oct 30 15:43:30 testbox kernel: [17658788.788000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658788.788000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658788.788000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.840000] mantis_i2c_write (1): Data<W[1]>=[0x1d]
Oct 30 15:43:30 testbox kernel: [17658788.840000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.892000] mantis_i2c_write (1): Data<W[2]>=[0x9c]
Oct 30 15:43:30 testbox kernel: [17658788.892000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.944000] stb0899_write_reg: Norm Write buf=[f4 1e 42 47]
Oct 30 15:43:30 testbox kernel: [17658788.944000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658788.944000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658788.944000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658788.996000] mantis_i2c_write (1): Data<W[1]>=[0x1e]
Oct 30 15:43:30 testbox kernel: [17658788.996000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658789.048000] mantis_i2c_write (1): Data<W[2]>=[0x42]
Oct 30 15:43:30 testbox kernel: [17658789.048000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:30 testbox kernel: [17658789.100000] stb0899_write_reg: Norm Write buf=[f4 1f 19 48]
Oct 30 15:43:30 testbox kernel: [17658789.100000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:30 testbox kernel: [17658789.100000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:30 testbox kernel: [17658789.100000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.152000] mantis_i2c_write (1): Data<W[1]>=[0x1f]
Oct 30 15:43:31 testbox kernel: [17658789.152000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.204000] mantis_i2c_write (1): Data<W[2]>=[0x19]
Oct 30 15:43:31 testbox kernel: [17658789.204000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.256000] stb0899_write_reg: Norm Write buf=[f4 20 e3 49]
Oct 30 15:43:31 testbox kernel: [17658789.256000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:31 testbox kernel: [17658789.256000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:31 testbox kernel: [17658789.256000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.308000] mantis_i2c_write (1): Data<W[1]>=[0x20]
Oct 30 15:43:31 testbox kernel: [17658789.308000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.360000] mantis_i2c_write (1): Data<W[2]>=[0xe3]
Oct 30 15:43:31 testbox kernel: [17658789.360000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.412000] stb0899_write_reg: Norm Write buf=[f4 25 b4 4a]
Oct 30 15:43:31 testbox kernel: [17658789.412000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:31 testbox kernel: [17658789.412000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:31 testbox kernel: [17658789.412000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.464000] mantis_i2c_write (1): Data<W[1]>=[0x25]
Oct 30 15:43:31 testbox kernel: [17658789.464000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.516000] mantis_i2c_write (1): Data<W[2]>=[0xb4]
Oct 30 15:43:31 testbox kernel: [17658789.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.568000] stb0899_write_reg: Norm Write buf=[f4 26 08 4b]
Oct 30 15:43:31 testbox kernel: [17658789.568000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:31 testbox kernel: [17658789.568000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:31 testbox kernel: [17658789.568000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.620000] mantis_i2c_write (1): Data<W[1]>=[0x26]
Oct 30 15:43:31 testbox kernel: [17658789.620000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.672000] mantis_i2c_write (1): Data<W[2]>=[0x08]
Oct 30 15:43:31 testbox kernel: [17658789.672000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.724000] stb0899_write_reg: Norm Write buf=[f4 27 30 4c]
Oct 30 15:43:31 testbox kernel: [17658789.724000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:31 testbox kernel: [17658789.724000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:31 testbox kernel: [17658789.724000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.776000] mantis_i2c_write (1): Data<W[1]>=[0x27]
Oct 30 15:43:31 testbox kernel: [17658789.776000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.828000] mantis_i2c_write (1): Data<W[2]>=[0x30]
Oct 30 15:43:31 testbox kernel: [17658789.828000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.880000] stb0899_write_reg: Norm Write buf=[f4 46 2f 4d]
Oct 30 15:43:31 testbox kernel: [17658789.880000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:31 testbox kernel: [17658789.880000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:31 testbox kernel: [17658789.880000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.932000] mantis_i2c_write (1): Data<W[1]>=[0x46]
Oct 30 15:43:31 testbox kernel: [17658789.932000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658789.984000] mantis_i2c_write (1): Data<W[2]>=[0x2f]
Oct 30 15:43:31 testbox kernel: [17658789.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658790.036000] stb0899_write_reg: Norm Write buf=[f4 47 68 4e]
Oct 30 15:43:31 testbox kernel: [17658790.036000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:31 testbox kernel: [17658790.036000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:31 testbox kernel: [17658790.036000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:31 testbox kernel: [17658790.088000] mantis_i2c_write (1): Data<W[1]>=[0x47]
Oct 30 15:43:31 testbox kernel: [17658790.088000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.140000] mantis_i2c_write (1): Data<W[2]>=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.140000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.192000] stb0899_write_reg: Norm Write buf=[f4 48 50 4f]
Oct 30 15:43:32 testbox kernel: [17658790.192000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.192000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:32 testbox kernel: [17658790.192000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.244000] mantis_i2c_write (1): Data<W[1]>=[0x48]
Oct 30 15:43:32 testbox kernel: [17658790.244000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.296000] mantis_i2c_write (1): Data<W[2]>=[0x50]
Oct 30 15:43:32 testbox kernel: [17658790.296000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.348000] stb0899_write_reg: Norm Write buf=[f4 4c 2f 50]
Oct 30 15:43:32 testbox kernel: [17658790.348000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.348000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:32 testbox kernel: [17658790.348000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.400000] mantis_i2c_write (1): Data<W[1]>=[0x4c]
Oct 30 15:43:32 testbox kernel: [17658790.400000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.452000] mantis_i2c_write (1): Data<W[2]>=[0x2f]
Oct 30 15:43:32 testbox kernel: [17658790.452000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.504000] stb0899_write_reg: Norm Write buf=[f4 4d 68 51]
Oct 30 15:43:32 testbox kernel: [17658790.504000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.504000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:32 testbox kernel: [17658790.504000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.556000] mantis_i2c_write (1): Data<W[1]>=[0x4d]
Oct 30 15:43:32 testbox kernel: [17658790.556000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.608000] mantis_i2c_write (1): Data<W[2]>=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.608000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.660000] stb0899_write_reg: Norm Write buf=[f4 4e 50 52]
Oct 30 15:43:32 testbox kernel: [17658790.660000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.660000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:32 testbox kernel: [17658790.660000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.712000] mantis_i2c_write (1): Data<W[1]>=[0x4e]
Oct 30 15:43:32 testbox kernel: [17658790.712000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.764000] mantis_i2c_write (1): Data<W[2]>=[0x50]
Oct 30 15:43:32 testbox kernel: [17658790.764000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.816000] stb0899_write_reg: Norm Write buf=[f5 0d 00 53]
Oct 30 15:43:32 testbox kernel: [17658790.816000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.816000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:32 testbox kernel: [17658790.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.868000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:32 testbox kernel: [17658790.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.920000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:32 testbox kernel: [17658790.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658790.972000] stb0899_write_reg: Norm Write buf=[f5 30 07 54]
Oct 30 15:43:32 testbox kernel: [17658790.972000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:32 testbox kernel: [17658790.972000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:32 testbox kernel: [17658790.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658791.024000] mantis_i2c_write (1): Data<W[1]>=[0x30]
Oct 30 15:43:32 testbox kernel: [17658791.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:32 testbox kernel: [17658791.076000] mantis_i2c_write (1): Data<W[2]>=[0x07]
Oct 30 15:43:32 testbox kernel: [17658791.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.128000] stb0899_write_reg: Norm Write buf=[f5 33 08 55]
Oct 30 15:43:33 testbox kernel: [17658791.128000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658791.128000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658791.128000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.180000] mantis_i2c_write (1): Data<W[1]>=[0x33]
Oct 30 15:43:33 testbox kernel: [17658791.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.232000] mantis_i2c_write (1): Data<W[2]>=[0x08]
Oct 30 15:43:33 testbox kernel: [17658791.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.284000] stb0899_write_reg: Norm Write buf=[f5 34 e8 56]
Oct 30 15:43:33 testbox kernel: [17658791.284000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658791.284000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658791.284000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.336000] mantis_i2c_write (1): Data<W[1]>=[0x34]
Oct 30 15:43:33 testbox kernel: [17658791.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.388000] mantis_i2c_write (1): Data<W[2]>=[0xe8]
Oct 30 15:43:33 testbox kernel: [17658791.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.440000] stb0899_write_reg: Norm Write buf=[f5 35 a0 57]
Oct 30 15:43:33 testbox kernel: [17658791.440000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658791.440000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658791.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.492000] mantis_i2c_write (1): Data<W[1]>=[0x35]
Oct 30 15:43:33 testbox kernel: [17658791.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.544000] mantis_i2c_write (1): Data<W[2]>=[0xa0]
Oct 30 15:43:33 testbox kernel: [17658791.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.596000] stb0899_write_reg: Norm Write buf=[f5 36 78 58]
Oct 30 15:43:33 testbox kernel: [17658791.596000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658791.596000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658791.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.648000] mantis_i2c_write (1): Data<W[1]>=[0x36]
Oct 30 15:43:33 testbox kernel: [17658791.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.700000] mantis_i2c_write (1): Data<W[2]>=[0x78]
Oct 30 15:43:33 testbox kernel: [17658791.700000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.752000] stb0899_write_reg: Norm Write buf=[f5 37 48 59]
Oct 30 15:43:33 testbox kernel: [17658791.752000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658791.752000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658791.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.804000] mantis_i2c_write (1): Data<W[1]>=[0x37]
Oct 30 15:43:33 testbox kernel: [17658791.804000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.856000] mantis_i2c_write (1): Data<W[2]>=[0x48]
Oct 30 15:43:33 testbox kernel: [17658791.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.908000] stb0899_write_reg: Norm Write buf=[f5 38 44 5a]
Oct 30 15:43:33 testbox kernel: [17658791.908000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658791.908000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658791.908000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658791.960000] mantis_i2c_write (1): Data<W[1]>=[0x38]
Oct 30 15:43:33 testbox kernel: [17658791.960000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658792.012000] mantis_i2c_write (1): Data<W[2]>=[0x44]
Oct 30 15:43:33 testbox kernel: [17658792.012000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:33 testbox kernel: [17658792.064000] stb0899_write_reg: Norm Write buf=[f5 39 28 5b]
Oct 30 15:43:33 testbox kernel: [17658792.064000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:33 testbox kernel: [17658792.064000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:33 testbox kernel: [17658792.064000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.116000] mantis_i2c_write (1): Data<W[1]>=[0x39]
Oct 30 15:43:34 testbox kernel: [17658792.116000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.168000] mantis_i2c_write (1): Data<W[2]>=[0x28]
Oct 30 15:43:34 testbox kernel: [17658792.168000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.220000] stb0899_write_reg: Norm Write buf=[f5 3c 3f 5c]
Oct 30 15:43:34 testbox kernel: [17658792.220000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:34 testbox kernel: [17658792.220000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:34 testbox kernel: [17658792.220000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.272000] mantis_i2c_write (1): Data<W[1]>=[0x3c]
Oct 30 15:43:34 testbox kernel: [17658792.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.324000] mantis_i2c_write (1): Data<W[2]>=[0x3f]
Oct 30 15:43:34 testbox kernel: [17658792.324000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.376000] stb0899_write_reg: Norm Write buf=[f5 3d 99 5d]
Oct 30 15:43:34 testbox kernel: [17658792.376000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:34 testbox kernel: [17658792.376000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:34 testbox kernel: [17658792.376000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.428000] mantis_i2c_write (1): Data<W[1]>=[0x3d]
Oct 30 15:43:34 testbox kernel: [17658792.428000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.480000] mantis_i2c_write (1): Data<W[2]>=[0x99]
Oct 30 15:43:34 testbox kernel: [17658792.480000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.532000] stb0899_write_reg: Norm Write buf=[f5 48 b1 5e]
Oct 30 15:43:34 testbox kernel: [17658792.532000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:34 testbox kernel: [17658792.532000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:34 testbox kernel: [17658792.532000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.584000] mantis_i2c_write (1): Data<W[1]>=[0x48]
Oct 30 15:43:34 testbox kernel: [17658792.584000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.636000] mantis_i2c_write (1): Data<W[2]>=[0xb1]
Oct 30 15:43:34 testbox kernel: [17658792.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.688000] stb0899_write_reg: Norm Write buf=[f5 49 42 5f]
Oct 30 15:43:34 testbox kernel: [17658792.688000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:34 testbox kernel: [17658792.688000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:34 testbox kernel: [17658792.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.740000] mantis_i2c_write (1): Data<W[1]>=[0x49]
Oct 30 15:43:34 testbox kernel: [17658792.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.792000] mantis_i2c_write (1): Data<W[2]>=[0x42]
Oct 30 15:43:34 testbox kernel: [17658792.792000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.844000] stb0899_write_reg: Norm Write buf=[f5 4a 40 60]
Oct 30 15:43:34 testbox kernel: [17658792.844000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:34 testbox kernel: [17658792.844000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:34 testbox kernel: [17658792.844000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.896000] mantis_i2c_write (1): Data<W[1]>=[0x4a]
Oct 30 15:43:34 testbox kernel: [17658792.896000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658792.948000] mantis_i2c_write (1): Data<W[2]>=[0x40]
Oct 30 15:43:34 testbox kernel: [17658792.948000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658793.000000] stb0899_write_reg: Norm Write buf=[f5 4b 02 61]
Oct 30 15:43:34 testbox kernel: [17658793.000000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:34 testbox kernel: [17658793.000000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:34 testbox kernel: [17658793.000000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658793.052000] mantis_i2c_write (1): Data<W[1]>=[0x4b]
Oct 30 15:43:34 testbox kernel: [17658793.052000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:34 testbox kernel: [17658793.104000] mantis_i2c_write (1): Data<W[2]>=[0x02]
Oct 30 15:43:34 testbox kernel: [17658793.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.156000] stb0899_write_reg: Norm Write buf=[f5 4c 0c 62]
Oct 30 15:43:35 testbox kernel: [17658793.156000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658793.156000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658793.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.208000] mantis_i2c_write (1): Data<W[1]>=[0x4c]
Oct 30 15:43:35 testbox kernel: [17658793.208000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.260000] mantis_i2c_write (1): Data<W[2]>=[0x0c]
Oct 30 15:43:35 testbox kernel: [17658793.260000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.312000] stb0899_write_reg: Norm Write buf=[f5 4d 00 63]
Oct 30 15:43:35 testbox kernel: [17658793.312000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658793.312000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658793.312000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.364000] mantis_i2c_write (1): Data<W[1]>=[0x4d]
Oct 30 15:43:35 testbox kernel: [17658793.364000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.416000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:35 testbox kernel: [17658793.416000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.468000] stb0899_write_reg: Norm Write buf=[f5 4e 00 64]
Oct 30 15:43:35 testbox kernel: [17658793.468000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658793.468000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658793.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.520000] mantis_i2c_write (1): Data<W[1]>=[0x4e]
Oct 30 15:43:35 testbox kernel: [17658793.520000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.572000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:35 testbox kernel: [17658793.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.624000] stb0899_write_reg: Norm Write buf=[f5 4f 07 65]
Oct 30 15:43:35 testbox kernel: [17658793.624000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658793.624000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658793.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.676000] mantis_i2c_write (1): Data<W[1]>=[0x4f]
Oct 30 15:43:35 testbox kernel: [17658793.676000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.728000] mantis_i2c_write (1): Data<W[2]>=[0x07]
Oct 30 15:43:35 testbox kernel: [17658793.728000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.780000] stb0899_write_reg: Norm Write buf=[f5 51 00 66]
Oct 30 15:43:35 testbox kernel: [17658793.780000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658793.780000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658793.780000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.832000] mantis_i2c_write (1): Data<W[1]>=[0x51]
Oct 30 15:43:35 testbox kernel: [17658793.832000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.884000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:35 testbox kernel: [17658793.884000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.936000] stb0899_write_reg: Norm Write buf=[f5 74 01 67]
Oct 30 15:43:35 testbox kernel: [17658793.936000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658793.936000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658793.936000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658793.988000] mantis_i2c_write (1): Data<W[1]>=[0x74]
Oct 30 15:43:35 testbox kernel: [17658793.988000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658794.040000] mantis_i2c_write (1): Data<W[2]>=[0x01]
Oct 30 15:43:35 testbox kernel: [17658794.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:35 testbox kernel: [17658794.092000] stb0899_write_reg: Norm Write buf=[f5 75 01 68]
Oct 30 15:43:35 testbox kernel: [17658794.092000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:35 testbox kernel: [17658794.092000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:35 testbox kernel: [17658794.092000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.144000] mantis_i2c_write (1): Data<W[1]>=[0x75]
Oct 30 15:43:36 testbox kernel: [17658794.144000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.196000] mantis_i2c_write (1): Data<W[2]>=[0x01]
Oct 30 15:43:36 testbox kernel: [17658794.196000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.248000] stb0899_write_reg: Norm Write buf=[f5 76 01 69]
Oct 30 15:43:36 testbox kernel: [17658794.248000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:36 testbox kernel: [17658794.248000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:36 testbox kernel: [17658794.248000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.300000] mantis_i2c_write (1): Data<W[1]>=[0x76]
Oct 30 15:43:36 testbox kernel: [17658794.300000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.352000] mantis_i2c_write (1): Data<W[2]>=[0x01]
Oct 30 15:43:36 testbox kernel: [17658794.352000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.404000] stb0899_write_reg: Norm Write buf=[f5 83 3f 6a]
Oct 30 15:43:36 testbox kernel: [17658794.404000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:36 testbox kernel: [17658794.404000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:36 testbox kernel: [17658794.404000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.456000] mantis_i2c_write (1): Data<W[1]>=[0x83]
Oct 30 15:43:36 testbox kernel: [17658794.456000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.508000] mantis_i2c_write (1): Data<W[2]>=[0x3f]
Oct 30 15:43:36 testbox kernel: [17658794.508000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.560000] stb0899_write_reg: Norm Write buf=[f6 00 42 6b]
Oct 30 15:43:36 testbox kernel: [17658794.560000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:36 testbox kernel: [17658794.560000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:36 testbox kernel: [17658794.560000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.612000] mantis_i2c_write (1): Data<W[1]>=[0x00]
Oct 30 15:43:36 testbox kernel: [17658794.612000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.664000] mantis_i2c_write (1): Data<W[2]>=[0x42]
Oct 30 15:43:36 testbox kernel: [17658794.664000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.716000] stb0899_write_reg: Norm Write buf=[f6 01 00 6c]
Oct 30 15:43:36 testbox kernel: [17658794.716000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:36 testbox kernel: [17658794.716000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:36 testbox kernel: [17658794.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.768000] mantis_i2c_write (1): Data<W[1]>=[0x01]
Oct 30 15:43:36 testbox kernel: [17658794.768000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.820000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:36 testbox kernel: [17658794.820000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.872000] stb0899_write_reg: Norm Write buf=[f6 02 00 6d]
Oct 30 15:43:36 testbox kernel: [17658794.872000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:36 testbox kernel: [17658794.872000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:36 testbox kernel: [17658794.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.924000] mantis_i2c_write (1): Data<W[1]>=[0x02]
Oct 30 15:43:36 testbox kernel: [17658794.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658794.976000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:36 testbox kernel: [17658794.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658795.028000] stb0899_write_reg: Norm Write buf=[f6 03 00 6e]
Oct 30 15:43:36 testbox kernel: [17658795.028000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:36 testbox kernel: [17658795.028000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:36 testbox kernel: [17658795.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:36 testbox kernel: [17658795.080000] mantis_i2c_write (1): Data<W[1]>=[0x03]
Oct 30 15:43:36 testbox kernel: [17658795.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.132000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:37 testbox kernel: [17658795.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.184000] stb0899_write_reg: Norm Write buf=[f6 04 77 6f]
Oct 30 15:43:37 testbox kernel: [17658795.184000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:37 testbox kernel: [17658795.184000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:37 testbox kernel: [17658795.184000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.236000] mantis_i2c_write (1): Data<W[1]>=[0x04]
Oct 30 15:43:37 testbox kernel: [17658795.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.288000] mantis_i2c_write (1): Data<W[2]>=[0x77]
Oct 30 15:43:37 testbox kernel: [17658795.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.340000] stb0899_write_reg: Norm Write buf=[f6 05 00 70]
Oct 30 15:43:37 testbox kernel: [17658795.340000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:37 testbox kernel: [17658795.340000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:37 testbox kernel: [17658795.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.392000] mantis_i2c_write (1): Data<W[1]>=[0x05]
Oct 30 15:43:37 testbox kernel: [17658795.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.444000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:37 testbox kernel: [17658795.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.496000] stb0899_write_reg: Norm Write buf=[f6 07 00 71]
Oct 30 15:43:37 testbox kernel: [17658795.496000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:37 testbox kernel: [17658795.496000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:37 testbox kernel: [17658795.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.548000] mantis_i2c_write (1): Data<W[1]>=[0x07]
Oct 30 15:43:37 testbox kernel: [17658795.548000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.600000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:37 testbox kernel: [17658795.600000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.652000] stb0899_write_reg: Norm Write buf=[f6 09 00 72]
Oct 30 15:43:37 testbox kernel: [17658795.652000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:37 testbox kernel: [17658795.652000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:37 testbox kernel: [17658795.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.704000] mantis_i2c_write (1): Data<W[1]>=[0x09]
Oct 30 15:43:37 testbox kernel: [17658795.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.756000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:37 testbox kernel: [17658795.756000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.808000] stb0899_write_reg: Norm Write buf=[f6 0b 00 73]
Oct 30 15:43:37 testbox kernel: [17658795.808000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:37 testbox kernel: [17658795.808000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:37 testbox kernel: [17658795.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.860000] mantis_i2c_write (1): Data<W[1]>=[0x0b]
Oct 30 15:43:37 testbox kernel: [17658795.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.912000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:37 testbox kernel: [17658795.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658795.964000] stb0899_write_reg: Norm Write buf=[f6 0c 00 74]
Oct 30 15:43:37 testbox kernel: [17658795.964000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:37 testbox kernel: [17658795.964000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:37 testbox kernel: [17658795.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658796.016000] mantis_i2c_write (1): Data<W[1]>=[0x0c]
Oct 30 15:43:37 testbox kernel: [17658796.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:37 testbox kernel: [17658796.068000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:37 testbox kernel: [17658796.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.120000] stb0899_write_reg: Norm Write buf=[f6 0e 00 75]
Oct 30 15:43:38 testbox kernel: [17658796.120000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658796.120000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658796.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.172000] mantis_i2c_write (1): Data<W[1]>=[0x0e]
Oct 30 15:43:38 testbox kernel: [17658796.172000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.224000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:38 testbox kernel: [17658796.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.276000] stb0899_write_reg: Norm Write buf=[f6 0f 00 76]
Oct 30 15:43:38 testbox kernel: [17658796.276000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658796.276000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658796.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.328000] mantis_i2c_write (1): Data<W[1]>=[0x0f]
Oct 30 15:43:38 testbox kernel: [17658796.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.380000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:38 testbox kernel: [17658796.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.432000] stb0899_write_reg: Norm Write buf=[f6 10 f0 77]
Oct 30 15:43:38 testbox kernel: [17658796.432000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658796.432000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658796.432000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.484000] mantis_i2c_write (1): Data<W[1]>=[0x10]
Oct 30 15:43:38 testbox kernel: [17658796.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.536000] mantis_i2c_write (1): Data<W[2]>=[0xf0]
Oct 30 15:43:38 testbox kernel: [17658796.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.588000] stb0899_write_reg: Norm Write buf=[f6 12 05 78]
Oct 30 15:43:38 testbox kernel: [17658796.588000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658796.588000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658796.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.640000] mantis_i2c_write (1): Data<W[1]>=[0x12]
Oct 30 15:43:38 testbox kernel: [17658796.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.692000] mantis_i2c_write (1): Data<W[2]>=[0x05]
Oct 30 15:43:38 testbox kernel: [17658796.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.744000] stb0899_write_reg: Norm Write buf=[f6 14 a7 79]
Oct 30 15:43:38 testbox kernel: [17658796.744000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658796.744000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658796.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.796000] mantis_i2c_write (1): Data<W[1]>=[0x14]
Oct 30 15:43:38 testbox kernel: [17658796.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.848000] mantis_i2c_write (1): Data<W[2]>=[0xa7]
Oct 30 15:43:38 testbox kernel: [17658796.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.900000] stb0899_write_reg: Norm Write buf=[f6 16 47 7a]
Oct 30 15:43:38 testbox kernel: [17658796.900000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658796.900000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658796.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658796.952000] mantis_i2c_write (1): Data<W[1]>=[0x16]
Oct 30 15:43:38 testbox kernel: [17658796.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658797.004000] mantis_i2c_write (1): Data<W[2]>=[0x47]
Oct 30 15:43:38 testbox kernel: [17658797.004000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:38 testbox kernel: [17658797.056000] stb0899_write_reg: Norm Write buf=[f6 17 01 7b]
Oct 30 15:43:38 testbox kernel: [17658797.056000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:38 testbox kernel: [17658797.056000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:38 testbox kernel: [17658797.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.108000] mantis_i2c_write (1): Data<W[1]>=[0x17]
Oct 30 15:43:39 testbox kernel: [17658797.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.160000] mantis_i2c_write (1): Data<W[2]>=[0x01]
Oct 30 15:43:39 testbox kernel: [17658797.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.212000] stb0899_write_reg: Norm Write buf=[f6 19 13 7c]
Oct 30 15:43:39 testbox kernel: [17658797.212000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:39 testbox kernel: [17658797.212000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:39 testbox kernel: [17658797.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.264000] mantis_i2c_write (1): Data<W[1]>=[0x19]
Oct 30 15:43:39 testbox kernel: [17658797.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.316000] mantis_i2c_write (1): Data<W[2]>=[0x13]
Oct 30 15:43:39 testbox kernel: [17658797.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.368000] stb0899_write_reg: Norm Write buf=[f6 1a 26 7d]
Oct 30 15:43:39 testbox kernel: [17658797.368000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:39 testbox kernel: [17658797.368000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:39 testbox kernel: [17658797.368000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.420000] mantis_i2c_write (1): Data<W[1]>=[0x1a]
Oct 30 15:43:39 testbox kernel: [17658797.420000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.472000] mantis_i2c_write (1): Data<W[2]>=[0x26]
Oct 30 15:43:39 testbox kernel: [17658797.472000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.524000] stb0899_write_reg: Norm Write buf=[f6 1b 00 7e]
Oct 30 15:43:39 testbox kernel: [17658797.524000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:39 testbox kernel: [17658797.524000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:39 testbox kernel: [17658797.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.576000] mantis_i2c_write (1): Data<W[1]>=[0x1b]
Oct 30 15:43:39 testbox kernel: [17658797.576000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.628000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:39 testbox kernel: [17658797.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.680000] stb0899_write_reg: Norm Write buf=[f6 1d 00 7f]
Oct 30 15:43:39 testbox kernel: [17658797.680000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:39 testbox kernel: [17658797.680000] mantis_i2c_write (1): Data<W[0]>=[0xf6]
Oct 30 15:43:39 testbox kernel: [17658797.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.732000] mantis_i2c_write (1): Data<W[1]>=[0x1d]
Oct 30 15:43:39 testbox kernel: [17658797.732000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.784000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:39 testbox kernel: [17658797.784000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.836000] stb0899_write_reg: Norm Write buf=[f4 36 00 80]
Oct 30 15:43:39 testbox kernel: [17658797.836000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:39 testbox kernel: [17658797.836000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:39 testbox kernel: [17658797.836000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.888000] mantis_i2c_write (1): Data<W[1]>=[0x36]
Oct 30 15:43:39 testbox kernel: [17658797.888000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.940000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:39 testbox kernel: [17658797.940000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658797.992000] stb0899_write_reg: Norm Write buf=[f4 37 00 81]
Oct 30 15:43:39 testbox kernel: [17658797.992000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:39 testbox kernel: [17658797.992000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:39 testbox kernel: [17658797.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658798.044000] mantis_i2c_write (1): Data<W[1]>=[0x37]
Oct 30 15:43:39 testbox kernel: [17658798.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:39 testbox kernel: [17658798.096000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:39 testbox kernel: [17658798.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.148000] stb0899_write_reg: Norm Write buf=[f4 2e 00 82]
Oct 30 15:43:40 testbox kernel: [17658798.148000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.148000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:43:40 testbox kernel: [17658798.148000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.200000] mantis_i2c_write (1): Data<W[1]>=[0x2e]
Oct 30 15:43:40 testbox kernel: [17658798.200000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.252000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:40 testbox kernel: [17658798.252000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.304000] stb0899_write_reg: Norm Write buf=[ff 11 40 83]
Oct 30 15:43:40 testbox kernel: [17658798.304000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.304000] mantis_i2c_write (1): Data<W[0]>=[0xff]
Oct 30 15:43:40 testbox kernel: [17658798.304000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.356000] mantis_i2c_write (1): Data<W[1]>=[0x11]
Oct 30 15:43:40 testbox kernel: [17658798.356000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.408000] mantis_i2c_write (1): Data<W[2]>=[0x40]
Oct 30 15:43:40 testbox kernel: [17658798.408000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.460000] stb0899_write_reg: Norm Write buf=[f5 4c 04 10]
Oct 30 15:43:40 testbox kernel: [17658798.460000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.460000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:40 testbox kernel: [17658798.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.512000] mantis_i2c_write (1): Data<W[1]>=[0x4c]
Oct 30 15:43:40 testbox kernel: [17658798.512000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.564000] mantis_i2c_write (1): Data<W[2]>=[0x04]
Oct 30 15:43:40 testbox kernel: [17658798.564000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.616000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.616000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:43:40 testbox kernel: [17658798.616000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.668000] mantis_i2c_write (1): Data<W[1]>=[0x2a]
Oct 30 15:43:40 testbox kernel: [17658798.668000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.720000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.720000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.772000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:40 testbox kernel: [17658798.780000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.832000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:40 testbox kernel: [17658798.840000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:40 testbox kernel: [17658798.840000] mantis_i2c_write (1): Address=[0x08]
Oct 30 15:43:40 testbox kernel: [17658798.840000] mantis_i2c_write (1): Data<W[0]>=[0x44]
Oct 30 15:43:40 testbox kernel: [17658798.840000] === Interrupts[fc000001/0003]=7 [* DMA enabl ** I2C R-ACK ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.856000] stb0899_check_data: Forcing Search loop
Oct 30 15:43:40 testbox kernel: [17658798.856000] stb0899_write_reg: Norm Write buf=[f5 0c 00 28]
Oct 30 15:43:40 testbox kernel: [17658798.856000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.856000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:40 testbox kernel: [17658798.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.872000] mantis_i2c_write (1): Data<W[1]>=[0x0c]
Oct 30 15:43:40 testbox kernel: [17658798.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.924000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:43:40 testbox kernel: [17658798.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658798.976000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658798.976000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:40 testbox kernel: [17658798.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658799.028000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:40 testbox kernel: [17658799.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:40 testbox kernel: [17658799.080000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:40 testbox kernel: [17658799.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.132000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.140000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.192000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.200000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:41 testbox kernel: [17658799.212000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.212000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:41 testbox kernel: [17658799.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.264000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:41 testbox kernel: [17658799.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.316000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.368000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.376000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.428000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.436000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:41 testbox kernel: [17658799.448000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.448000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:41 testbox kernel: [17658799.448000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.500000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:41 testbox kernel: [17658799.500000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.552000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.552000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.604000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.612000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.664000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.672000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:41 testbox kernel: [17658799.684000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.684000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:41 testbox kernel: [17658799.684000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.736000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:41 testbox kernel: [17658799.736000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.788000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.788000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.840000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.900000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658799.908000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:41 testbox kernel: [17658799.920000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658799.920000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:41 testbox kernel: [17658799.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658799.972000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:41 testbox kernel: [17658799.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658800.024000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:41 testbox kernel: [17658800.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:41 testbox kernel: [17658800.076000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:41 testbox kernel: [17658800.084000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.136000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.144000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:42 testbox kernel: [17658800.156000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.156000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:42 testbox kernel: [17658800.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.208000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:42 testbox kernel: [17658800.208000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.260000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.260000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.312000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.320000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.372000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.380000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:42 testbox kernel: [17658800.392000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.392000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:42 testbox kernel: [17658800.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.444000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:42 testbox kernel: [17658800.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.496000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.548000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.556000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.608000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.616000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:42 testbox kernel: [17658800.628000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.628000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:42 testbox kernel: [17658800.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.680000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:42 testbox kernel: [17658800.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.732000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.732000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.784000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.792000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.844000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658800.852000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:42 testbox kernel: [17658800.864000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.864000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:42 testbox kernel: [17658800.864000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.916000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:42 testbox kernel: [17658800.916000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658800.968000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658800.968000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658801.020000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658801.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:42 testbox kernel: [17658801.080000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:42 testbox kernel: [17658801.088000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:42 testbox kernel: [17658801.100000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:42 testbox kernel: [17658801.100000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:42 testbox kernel: [17658801.100000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.152000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:43 testbox kernel: [17658801.152000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.204000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.204000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.256000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.316000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.324000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:43 testbox kernel: [17658801.336000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.336000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:43 testbox kernel: [17658801.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.388000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:43 testbox kernel: [17658801.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.440000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.492000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.500000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.552000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.560000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:43 testbox kernel: [17658801.572000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.572000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:43 testbox kernel: [17658801.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.624000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:43 testbox kernel: [17658801.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.676000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.676000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.728000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.736000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.788000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.796000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:43 testbox kernel: [17658801.808000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.808000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:43 testbox kernel: [17658801.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.860000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:43 testbox kernel: [17658801.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.912000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658801.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658801.964000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658801.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658802.024000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:43 testbox kernel: [17658802.032000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:43 testbox kernel: [17658802.044000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:43 testbox kernel: [17658802.044000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:43 testbox kernel: [17658802.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:43 testbox kernel: [17658802.096000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:43 testbox kernel: [17658802.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.148000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.148000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.200000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.208000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.260000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.268000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:44 testbox kernel: [17658802.280000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.280000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:44 testbox kernel: [17658802.280000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.332000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:44 testbox kernel: [17658802.332000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.384000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.384000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.436000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.496000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.504000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:44 testbox kernel: [17658802.516000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.516000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:44 testbox kernel: [17658802.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.568000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:44 testbox kernel: [17658802.568000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.620000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.620000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.672000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.732000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.740000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:44 testbox kernel: [17658802.752000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.752000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:44 testbox kernel: [17658802.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.804000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:44 testbox kernel: [17658802.804000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.856000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.908000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.916000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658802.968000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:44 testbox kernel: [17658802.976000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:44 testbox kernel: [17658802.988000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658802.988000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:44 testbox kernel: [17658802.988000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658803.040000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:44 testbox kernel: [17658803.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:44 testbox kernel: [17658803.092000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:44 testbox kernel: [17658803.092000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.144000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.152000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.204000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.212000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:45 testbox kernel: [17658803.224000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.224000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:45 testbox kernel: [17658803.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.276000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:45 testbox kernel: [17658803.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.328000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.380000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.440000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.448000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:45 testbox kernel: [17658803.460000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.460000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:45 testbox kernel: [17658803.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.512000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:45 testbox kernel: [17658803.512000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.564000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.564000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.616000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.676000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.684000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:45 testbox kernel: [17658803.696000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.696000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:45 testbox kernel: [17658803.696000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.748000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:45 testbox kernel: [17658803.748000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.800000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.800000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.852000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.912000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658803.920000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:45 testbox kernel: [17658803.932000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658803.932000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:45 testbox kernel: [17658803.932000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658803.984000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:45 testbox kernel: [17658803.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658804.036000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:45 testbox kernel: [17658804.036000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:45 testbox kernel: [17658804.088000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:45 testbox kernel: [17658804.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.148000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.156000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:46 testbox kernel: [17658804.168000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.168000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:46 testbox kernel: [17658804.168000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.220000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:46 testbox kernel: [17658804.220000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.272000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.324000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.332000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.384000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.392000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:46 testbox kernel: [17658804.404000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.404000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:46 testbox kernel: [17658804.404000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.456000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:46 testbox kernel: [17658804.456000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.508000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.508000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.560000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.568000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.620000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.628000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:46 testbox kernel: [17658804.640000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.640000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:46 testbox kernel: [17658804.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.692000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:46 testbox kernel: [17658804.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.744000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.796000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.804000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.856000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658804.864000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:46 testbox kernel: [17658804.876000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.876000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:46 testbox kernel: [17658804.876000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.928000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:46 testbox kernel: [17658804.928000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658804.980000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:46 testbox kernel: [17658804.980000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658805.032000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658805.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:46 testbox kernel: [17658805.092000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:46 testbox kernel: [17658805.100000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:47 testbox kernel: [17658805.112000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.112000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:47 testbox kernel: [17658805.112000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.164000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:47 testbox kernel: [17658805.164000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.216000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.268000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.328000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.336000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:47 testbox kernel: [17658805.348000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.348000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:47 testbox kernel: [17658805.348000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.400000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:47 testbox kernel: [17658805.400000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.452000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.452000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.504000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.512000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.564000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.572000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:47 testbox kernel: [17658805.584000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.584000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:47 testbox kernel: [17658805.584000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.636000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:47 testbox kernel: [17658805.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.688000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.740000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.748000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.800000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.808000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:47 testbox kernel: [17658805.820000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.820000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:47 testbox kernel: [17658805.820000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.872000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:47 testbox kernel: [17658805.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.924000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658805.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658805.976000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658805.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:47 testbox kernel: [17658806.036000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:47 testbox kernel: [17658806.044000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:47 testbox kernel: [17658806.056000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:47 testbox kernel: [17658806.056000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:47 testbox kernel: [17658806.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.108000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:48 testbox kernel: [17658806.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.160000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.212000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.220000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.272000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.280000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:48 testbox kernel: [17658806.292000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.292000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:48 testbox kernel: [17658806.292000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.344000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:48 testbox kernel: [17658806.344000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.396000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.396000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.448000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.456000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.508000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.516000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:48 testbox kernel: [17658806.528000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.528000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:48 testbox kernel: [17658806.528000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.580000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:48 testbox kernel: [17658806.580000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.632000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.632000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.684000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.744000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.752000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:48 testbox kernel: [17658806.764000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.764000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:48 testbox kernel: [17658806.764000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.816000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:48 testbox kernel: [17658806.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.868000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658806.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.920000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.928000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658806.980000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:48 testbox kernel: [17658806.988000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:48 testbox kernel: [17658807.000000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658807.000000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:48 testbox kernel: [17658807.000000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658807.052000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:48 testbox kernel: [17658807.052000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:48 testbox kernel: [17658807.104000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:48 testbox kernel: [17658807.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.156000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.164000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.216000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.224000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:49 testbox kernel: [17658807.236000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.236000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:49 testbox kernel: [17658807.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.288000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:49 testbox kernel: [17658807.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.340000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.392000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.400000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.452000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.460000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:49 testbox kernel: [17658807.472000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.472000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:49 testbox kernel: [17658807.472000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.524000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:49 testbox kernel: [17658807.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.576000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.576000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.628000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.688000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.696000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:49 testbox kernel: [17658807.708000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.708000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:49 testbox kernel: [17658807.708000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.760000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:49 testbox kernel: [17658807.760000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.812000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.812000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.864000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.924000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:49 testbox kernel: [17658807.932000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:49 testbox kernel: [17658807.944000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658807.944000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:49 testbox kernel: [17658807.944000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658807.996000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:49 testbox kernel: [17658807.996000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658808.048000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:49 testbox kernel: [17658808.048000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:49 testbox kernel: [17658808.100000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.160000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.168000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:50 testbox kernel: [17658808.180000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.180000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:50 testbox kernel: [17658808.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.232000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:50 testbox kernel: [17658808.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.284000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.284000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.336000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.344000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.396000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.404000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:50 testbox kernel: [17658808.416000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.416000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:50 testbox kernel: [17658808.416000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.468000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:50 testbox kernel: [17658808.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.520000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.520000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.572000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.580000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.632000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.640000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:50 testbox kernel: [17658808.652000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.652000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:50 testbox kernel: [17658808.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.704000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:50 testbox kernel: [17658808.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.756000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.756000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.808000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.868000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658808.876000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:50 testbox kernel: [17658808.888000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.888000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:50 testbox kernel: [17658808.888000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.940000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:50 testbox kernel: [17658808.940000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658808.992000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:50 testbox kernel: [17658808.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658809.044000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:50 testbox kernel: [17658809.052000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:50 testbox kernel: [17658809.104000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.112000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:51 testbox kernel: [17658809.124000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.124000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:51 testbox kernel: [17658809.124000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.176000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:51 testbox kernel: [17658809.176000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.228000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.228000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.280000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.340000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.348000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:51 testbox kernel: [17658809.360000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.360000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:51 testbox kernel: [17658809.360000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.412000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:51 testbox kernel: [17658809.412000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.464000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.464000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.516000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.576000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.584000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:51 testbox kernel: [17658809.596000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.596000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:51 testbox kernel: [17658809.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.648000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:51 testbox kernel: [17658809.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.700000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.700000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.752000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.760000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.812000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.820000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:51 testbox kernel: [17658809.832000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.832000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:51 testbox kernel: [17658809.832000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.884000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:51 testbox kernel: [17658809.884000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.936000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658809.936000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658809.988000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658809.996000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:51 testbox kernel: [17658810.048000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:51 testbox kernel: [17658810.056000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:51 testbox kernel: [17658810.068000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:51 testbox kernel: [17658810.068000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:51 testbox kernel: [17658810.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.120000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:52 testbox kernel: [17658810.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.172000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.172000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.224000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.284000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.292000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:52 testbox kernel: [17658810.304000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.304000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:52 testbox kernel: [17658810.304000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.356000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:52 testbox kernel: [17658810.356000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.408000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.408000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.460000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.520000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.528000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:52 testbox kernel: [17658810.540000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.540000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:52 testbox kernel: [17658810.540000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.592000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:52 testbox kernel: [17658810.592000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.644000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.644000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.696000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.756000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.764000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:52 testbox kernel: [17658810.776000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.776000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:52 testbox kernel: [17658810.776000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.828000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:52 testbox kernel: [17658810.828000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.880000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658810.880000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.932000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658810.940000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658810.992000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:52 testbox kernel: [17658811.000000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:52 testbox kernel: [17658811.012000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:52 testbox kernel: [17658811.012000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:52 testbox kernel: [17658811.012000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:52 testbox kernel: [17658811.064000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:52 testbox kernel: [17658811.064000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.116000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.116000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.168000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.176000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.228000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.236000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:53 testbox kernel: [17658811.248000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.248000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:53 testbox kernel: [17658811.248000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.300000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:53 testbox kernel: [17658811.300000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.352000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.352000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.404000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.412000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.464000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.472000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:53 testbox kernel: [17658811.484000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.484000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:53 testbox kernel: [17658811.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.536000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:53 testbox kernel: [17658811.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.588000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.640000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.700000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.708000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:53 testbox kernel: [17658811.720000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.720000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:53 testbox kernel: [17658811.720000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.772000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:53 testbox kernel: [17658811.772000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.824000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.824000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.876000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.884000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658811.936000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:53 testbox kernel: [17658811.944000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:53 testbox kernel: [17658811.956000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658811.956000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:53 testbox kernel: [17658811.956000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658812.008000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:53 testbox kernel: [17658812.008000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:53 testbox kernel: [17658812.060000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:53 testbox kernel: [17658812.060000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.112000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.172000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.180000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:54 testbox kernel: [17658812.192000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.192000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:54 testbox kernel: [17658812.192000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.244000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:54 testbox kernel: [17658812.244000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.296000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.296000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.348000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.356000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.408000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.416000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:54 testbox kernel: [17658812.428000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.428000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:54 testbox kernel: [17658812.428000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.480000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:54 testbox kernel: [17658812.480000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.532000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.532000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.584000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.592000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.644000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.652000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:54 testbox kernel: [17658812.664000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.664000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:54 testbox kernel: [17658812.664000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.716000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:54 testbox kernel: [17658812.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.768000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.768000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.820000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.828000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.880000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658812.888000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:54 testbox kernel: [17658812.900000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658812.900000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:54 testbox kernel: [17658812.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658812.952000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:54 testbox kernel: [17658812.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658813.004000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:54 testbox kernel: [17658813.004000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:54 testbox kernel: [17658813.056000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:54 testbox kernel: [17658813.064000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.116000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.124000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:55 testbox kernel: [17658813.136000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.136000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:55 testbox kernel: [17658813.136000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.188000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:55 testbox kernel: [17658813.188000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.240000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.240000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.292000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.300000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.352000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.360000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:55 testbox kernel: [17658813.372000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.372000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:55 testbox kernel: [17658813.372000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.424000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:55 testbox kernel: [17658813.424000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.476000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.476000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.528000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.588000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.596000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:55 testbox kernel: [17658813.608000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.608000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:55 testbox kernel: [17658813.608000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.660000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:55 testbox kernel: [17658813.660000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.712000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.712000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.764000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.772000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.824000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658813.832000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:55 testbox kernel: [17658813.844000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.844000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:55 testbox kernel: [17658813.844000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.896000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:55 testbox kernel: [17658813.896000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658813.948000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658813.948000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658814.000000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658814.008000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:55 testbox kernel: [17658814.060000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:55 testbox kernel: [17658814.068000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:55 testbox kernel: [17658814.080000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:55 testbox kernel: [17658814.080000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:55 testbox kernel: [17658814.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.132000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:56 testbox kernel: [17658814.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.184000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.184000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.236000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.244000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.296000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.304000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:56 testbox kernel: [17658814.316000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.316000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:56 testbox kernel: [17658814.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.368000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:56 testbox kernel: [17658814.368000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.420000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.420000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.472000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.480000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.532000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.540000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:56 testbox kernel: [17658814.552000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.552000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:56 testbox kernel: [17658814.552000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.604000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:56 testbox kernel: [17658814.604000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.656000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.656000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.708000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.768000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.776000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:56 testbox kernel: [17658814.788000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.788000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:56 testbox kernel: [17658814.788000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.840000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:56 testbox kernel: [17658814.840000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.892000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658814.892000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658814.944000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658814.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658815.004000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:56 testbox kernel: [17658815.012000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:56 testbox kernel: [17658815.024000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:56 testbox kernel: [17658815.024000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:56 testbox kernel: [17658815.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:56 testbox kernel: [17658815.076000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:56 testbox kernel: [17658815.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.128000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.128000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.180000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.188000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.240000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.248000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:57 testbox kernel: [17658815.260000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.260000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:57 testbox kernel: [17658815.260000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.312000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:57 testbox kernel: [17658815.312000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.364000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.364000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.416000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.424000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.476000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.484000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:57 testbox kernel: [17658815.496000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.496000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:57 testbox kernel: [17658815.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.548000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:57 testbox kernel: [17658815.548000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.600000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.600000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.652000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.660000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.712000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.720000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:57 testbox kernel: [17658815.732000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.732000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:57 testbox kernel: [17658815.732000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.784000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:57 testbox kernel: [17658815.784000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.836000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.836000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.888000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.896000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658815.948000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:57 testbox kernel: [17658815.956000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:57 testbox kernel: [17658815.968000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658815.968000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:57 testbox kernel: [17658815.968000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658816.020000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:57 testbox kernel: [17658816.020000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:57 testbox kernel: [17658816.072000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:57 testbox kernel: [17658816.072000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.124000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.184000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.192000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:58 testbox kernel: [17658816.204000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.204000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:58 testbox kernel: [17658816.204000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.256000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:58 testbox kernel: [17658816.256000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.308000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.308000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.360000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.368000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.420000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.428000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:58 testbox kernel: [17658816.440000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.440000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:58 testbox kernel: [17658816.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.492000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:58 testbox kernel: [17658816.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.544000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.596000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.604000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.656000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.664000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:58 testbox kernel: [17658816.676000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.676000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:58 testbox kernel: [17658816.676000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.728000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:58 testbox kernel: [17658816.728000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.780000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.780000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.832000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.840000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.892000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658816.900000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:58 testbox kernel: [17658816.912000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658816.912000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:58 testbox kernel: [17658816.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658816.964000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:58 testbox kernel: [17658816.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658817.016000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:58 testbox kernel: [17658817.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:58 testbox kernel: [17658817.068000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:58 testbox kernel: [17658817.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.128000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.136000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:59 testbox kernel: [17658817.148000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.148000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:59 testbox kernel: [17658817.148000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.200000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:59 testbox kernel: [17658817.200000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.252000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.252000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.304000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.312000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.364000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.372000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:59 testbox kernel: [17658817.384000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.384000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:59 testbox kernel: [17658817.384000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.436000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:59 testbox kernel: [17658817.436000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.488000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.488000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.540000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.548000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.600000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.608000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:59 testbox kernel: [17658817.620000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.620000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:59 testbox kernel: [17658817.620000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.672000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:59 testbox kernel: [17658817.672000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.724000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.724000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.776000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.784000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.836000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658817.844000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:59 testbox kernel: [17658817.856000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.856000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:59 testbox kernel: [17658817.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.908000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:43:59 testbox kernel: [17658817.908000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658817.960000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658817.960000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658818.012000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658818.020000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:43:59 testbox kernel: [17658818.072000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:43:59 testbox kernel: [17658818.080000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:43:59 testbox kernel: [17658818.092000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:43:59 testbox kernel: [17658818.092000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:43:59 testbox kernel: [17658818.092000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.144000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:00 testbox kernel: [17658818.144000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.196000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.196000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.248000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.256000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.308000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.316000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:00 testbox kernel: [17658818.328000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.328000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:00 testbox kernel: [17658818.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.380000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:00 testbox kernel: [17658818.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.432000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.432000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.484000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.544000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.552000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:00 testbox kernel: [17658818.564000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.564000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:00 testbox kernel: [17658818.564000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.616000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:00 testbox kernel: [17658818.616000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.668000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.668000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.720000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.728000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.780000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.788000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:00 testbox kernel: [17658818.800000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.800000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:00 testbox kernel: [17658818.800000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.852000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:00 testbox kernel: [17658818.852000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.904000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658818.904000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658818.956000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658818.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658819.016000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:00 testbox kernel: [17658819.024000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:00 testbox kernel: [17658819.036000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:00 testbox kernel: [17658819.036000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:00 testbox kernel: [17658819.036000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:00 testbox kernel: [17658819.088000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:00 testbox kernel: [17658819.088000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.140000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.140000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.192000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.200000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.252000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.260000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:01 testbox kernel: [17658819.272000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.272000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:01 testbox kernel: [17658819.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.324000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:01 testbox kernel: [17658819.324000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.376000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.376000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.428000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.436000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.488000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.496000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:01 testbox kernel: [17658819.508000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.508000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:01 testbox kernel: [17658819.508000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.560000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:01 testbox kernel: [17658819.560000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.612000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.612000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.664000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.672000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.724000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.732000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:01 testbox kernel: [17658819.744000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.744000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:01 testbox kernel: [17658819.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.796000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:01 testbox kernel: [17658819.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.848000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.900000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.908000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658819.960000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:01 testbox kernel: [17658819.968000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:01 testbox kernel: [17658819.980000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658819.980000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:01 testbox kernel: [17658819.980000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658820.032000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:01 testbox kernel: [17658820.032000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:01 testbox kernel: [17658820.084000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:01 testbox kernel: [17658820.084000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.136000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.144000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.196000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.204000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:02 testbox kernel: [17658820.216000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.216000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:02 testbox kernel: [17658820.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.268000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:02 testbox kernel: [17658820.268000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.320000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.320000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.372000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.432000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.440000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:02 testbox kernel: [17658820.452000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.452000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:02 testbox kernel: [17658820.452000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.504000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:02 testbox kernel: [17658820.504000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.556000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.556000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.608000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.616000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.668000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.676000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:02 testbox kernel: [17658820.688000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.688000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:02 testbox kernel: [17658820.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.740000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:02 testbox kernel: [17658820.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.792000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.792000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.844000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.852000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.904000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658820.912000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:02 testbox kernel: [17658820.924000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658820.924000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:02 testbox kernel: [17658820.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658820.976000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:02 testbox kernel: [17658820.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658821.028000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:02 testbox kernel: [17658821.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:02 testbox kernel: [17658821.080000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:02 testbox kernel: [17658821.088000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.140000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.148000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:03 testbox kernel: [17658821.160000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.160000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:03 testbox kernel: [17658821.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.212000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:03 testbox kernel: [17658821.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.264000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.316000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.324000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.376000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.384000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:03 testbox kernel: [17658821.396000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.396000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:03 testbox kernel: [17658821.396000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.448000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:03 testbox kernel: [17658821.448000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.500000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.500000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.552000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.560000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.612000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.620000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:03 testbox kernel: [17658821.632000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.632000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:03 testbox kernel: [17658821.632000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.684000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:03 testbox kernel: [17658821.684000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.736000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.736000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.788000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.848000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658821.856000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:03 testbox kernel: [17658821.868000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.868000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:03 testbox kernel: [17658821.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.920000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:03 testbox kernel: [17658821.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658821.972000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658821.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658822.024000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658822.032000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:03 testbox kernel: [17658822.084000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:03 testbox kernel: [17658822.092000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:03 testbox kernel: [17658822.104000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:03 testbox kernel: [17658822.104000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:03 testbox kernel: [17658822.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.156000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:04 testbox kernel: [17658822.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.208000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.208000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.260000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.268000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.320000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.328000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:04 testbox kernel: [17658822.340000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.340000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:04 testbox kernel: [17658822.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.392000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:04 testbox kernel: [17658822.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.444000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.496000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.504000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.556000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.564000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:04 testbox kernel: [17658822.576000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.576000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:04 testbox kernel: [17658822.576000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.628000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:04 testbox kernel: [17658822.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.680000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.732000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.792000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.800000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:04 testbox kernel: [17658822.812000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.812000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:04 testbox kernel: [17658822.812000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.864000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:04 testbox kernel: [17658822.864000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.916000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658822.916000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658822.968000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658822.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658823.028000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:04 testbox kernel: [17658823.036000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:04 testbox kernel: [17658823.048000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:04 testbox kernel: [17658823.048000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:04 testbox kernel: [17658823.048000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:04 testbox kernel: [17658823.100000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:04 testbox kernel: [17658823.100000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.152000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.152000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.204000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.264000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.272000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:05 testbox kernel: [17658823.284000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.284000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:05 testbox kernel: [17658823.284000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.336000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:05 testbox kernel: [17658823.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.388000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.440000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.448000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.500000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.508000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:05 testbox kernel: [17658823.520000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.520000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:05 testbox kernel: [17658823.520000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.572000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:05 testbox kernel: [17658823.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.624000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.676000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.684000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.736000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.744000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:05 testbox kernel: [17658823.756000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.756000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:05 testbox kernel: [17658823.756000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.808000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:05 testbox kernel: [17658823.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.860000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.912000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658823.972000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:05 testbox kernel: [17658823.980000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:05 testbox kernel: [17658823.992000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658823.992000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:05 testbox kernel: [17658823.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658824.044000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:05 testbox kernel: [17658824.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:05 testbox kernel: [17658824.096000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:05 testbox kernel: [17658824.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.148000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.208000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.216000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:06 testbox kernel: [17658824.228000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.228000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:06 testbox kernel: [17658824.228000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.280000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:06 testbox kernel: [17658824.280000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.332000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.332000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.384000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.444000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.452000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:06 testbox kernel: [17658824.464000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.464000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:06 testbox kernel: [17658824.464000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.516000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:06 testbox kernel: [17658824.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.568000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.568000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.620000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.680000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.688000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:06 testbox kernel: [17658824.700000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.700000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:06 testbox kernel: [17658824.700000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.752000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:06 testbox kernel: [17658824.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.804000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.804000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.856000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.864000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.916000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658824.924000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:06 testbox kernel: [17658824.936000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658824.936000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:06 testbox kernel: [17658824.936000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658824.988000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:06 testbox kernel: [17658824.988000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658825.040000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:06 testbox kernel: [17658825.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:06 testbox kernel: [17658825.092000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:06 testbox kernel: [17658825.100000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.152000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.160000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:07 testbox kernel: [17658825.172000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.172000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:07 testbox kernel: [17658825.172000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.224000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:07 testbox kernel: [17658825.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.276000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.328000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.388000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.396000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:07 testbox kernel: [17658825.408000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.408000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:07 testbox kernel: [17658825.408000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.460000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:07 testbox kernel: [17658825.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.512000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.512000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.564000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.624000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.632000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:07 testbox kernel: [17658825.644000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.644000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:07 testbox kernel: [17658825.644000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.696000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:07 testbox kernel: [17658825.696000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.748000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.748000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.800000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.860000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658825.868000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:07 testbox kernel: [17658825.880000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.880000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:07 testbox kernel: [17658825.880000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.932000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:07 testbox kernel: [17658825.932000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658825.984000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:07 testbox kernel: [17658825.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658826.036000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658826.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:07 testbox kernel: [17658826.096000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:07 testbox kernel: [17658826.104000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:08 testbox kernel: [17658826.116000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.116000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:08 testbox kernel: [17658826.116000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.168000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:08 testbox kernel: [17658826.168000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.220000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.220000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.272000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.280000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.332000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.340000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:08 testbox kernel: [17658826.352000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.352000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:08 testbox kernel: [17658826.352000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.404000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:08 testbox kernel: [17658826.404000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.456000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.456000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.508000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.568000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.576000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:08 testbox kernel: [17658826.588000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.588000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:08 testbox kernel: [17658826.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.640000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:08 testbox kernel: [17658826.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.692000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.744000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.804000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.812000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:08 testbox kernel: [17658826.824000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.824000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:08 testbox kernel: [17658826.824000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.876000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:08 testbox kernel: [17658826.876000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.928000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658826.928000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658826.980000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658826.988000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:08 testbox kernel: [17658827.040000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:08 testbox kernel: [17658827.048000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:08 testbox kernel: [17658827.060000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:08 testbox kernel: [17658827.060000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:08 testbox kernel: [17658827.060000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.112000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:09 testbox kernel: [17658827.112000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.164000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.164000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.216000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.276000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.284000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:09 testbox kernel: [17658827.296000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.296000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:09 testbox kernel: [17658827.296000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.348000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:09 testbox kernel: [17658827.348000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.400000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.400000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.452000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.512000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.520000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:09 testbox kernel: [17658827.532000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.532000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:09 testbox kernel: [17658827.532000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.584000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:09 testbox kernel: [17658827.584000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.636000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.688000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.696000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.748000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.756000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:09 testbox kernel: [17658827.768000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.768000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:09 testbox kernel: [17658827.768000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.820000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:09 testbox kernel: [17658827.820000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.872000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658827.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.924000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.932000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658827.984000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:09 testbox kernel: [17658827.992000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:09 testbox kernel: [17658828.004000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:09 testbox kernel: [17658828.004000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:09 testbox kernel: [17658828.004000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:09 testbox kernel: [17658828.056000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:09 testbox kernel: [17658828.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.108000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.160000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.168000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.220000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.228000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:10 testbox kernel: [17658828.240000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.240000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:10 testbox kernel: [17658828.240000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.292000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:10 testbox kernel: [17658828.292000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.344000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.344000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.396000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.404000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.456000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.464000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:10 testbox kernel: [17658828.476000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.476000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:10 testbox kernel: [17658828.476000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.528000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:10 testbox kernel: [17658828.528000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.580000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.580000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.632000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.692000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.700000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:10 testbox kernel: [17658828.712000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.712000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:10 testbox kernel: [17658828.712000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.764000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:10 testbox kernel: [17658828.764000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.816000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.868000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.876000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658828.928000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:10 testbox kernel: [17658828.936000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:10 testbox kernel: [17658828.948000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658828.948000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:10 testbox kernel: [17658828.948000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658829.000000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:10 testbox kernel: [17658829.000000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658829.052000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:10 testbox kernel: [17658829.052000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:10 testbox kernel: [17658829.104000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.112000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.164000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.172000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:11 testbox kernel: [17658829.184000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.184000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:11 testbox kernel: [17658829.184000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.236000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:11 testbox kernel: [17658829.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.288000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.340000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.348000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.400000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.408000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:11 testbox kernel: [17658829.420000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.420000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:11 testbox kernel: [17658829.420000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.472000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:11 testbox kernel: [17658829.472000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.524000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.576000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.584000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.636000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.644000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:11 testbox kernel: [17658829.656000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.656000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:11 testbox kernel: [17658829.656000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.708000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:11 testbox kernel: [17658829.708000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.760000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.760000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.812000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.820000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.872000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658829.880000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:11 testbox kernel: [17658829.892000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.892000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:11 testbox kernel: [17658829.892000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.944000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:11 testbox kernel: [17658829.944000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658829.996000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:11 testbox kernel: [17658829.996000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:11 testbox kernel: [17658830.048000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:11 testbox kernel: [17658830.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.108000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.116000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:12 testbox kernel: [17658830.128000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.128000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:12 testbox kernel: [17658830.128000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.180000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:12 testbox kernel: [17658830.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.232000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.284000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.292000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.344000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.352000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:12 testbox kernel: [17658830.364000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.364000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:12 testbox kernel: [17658830.364000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.416000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:12 testbox kernel: [17658830.416000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.468000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.520000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.528000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.580000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.588000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:12 testbox kernel: [17658830.600000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.600000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:12 testbox kernel: [17658830.600000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.652000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:12 testbox kernel: [17658830.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.704000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.756000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.764000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.816000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658830.824000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:12 testbox kernel: [17658830.836000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.836000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:12 testbox kernel: [17658830.836000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.888000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:12 testbox kernel: [17658830.888000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.940000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658830.940000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658830.992000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658831.000000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:12 testbox kernel: [17658831.052000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:12 testbox kernel: [17658831.060000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:12 testbox kernel: [17658831.072000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:12 testbox kernel: [17658831.072000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:12 testbox kernel: [17658831.072000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.124000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:13 testbox kernel: [17658831.124000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.176000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.176000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.228000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.288000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.296000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:13 testbox kernel: [17658831.308000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.308000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:13 testbox kernel: [17658831.308000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.360000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:13 testbox kernel: [17658831.360000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.412000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.412000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.464000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.472000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.524000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.532000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:13 testbox kernel: [17658831.544000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.544000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:13 testbox kernel: [17658831.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.596000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:13 testbox kernel: [17658831.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.648000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.700000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.708000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.760000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.768000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:13 testbox kernel: [17658831.780000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.780000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:13 testbox kernel: [17658831.780000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.832000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:13 testbox kernel: [17658831.832000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.884000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658831.884000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.936000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658831.944000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658831.996000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:13 testbox kernel: [17658832.004000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:13 testbox kernel: [17658832.016000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:13 testbox kernel: [17658832.016000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:13 testbox kernel: [17658832.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:13 testbox kernel: [17658832.068000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:13 testbox kernel: [17658832.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.120000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.172000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.232000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.240000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:14 testbox kernel: [17658832.252000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.252000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:14 testbox kernel: [17658832.252000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.304000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:14 testbox kernel: [17658832.304000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.356000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.356000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.408000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.416000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.468000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.476000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:14 testbox kernel: [17658832.488000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.488000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:14 testbox kernel: [17658832.488000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.540000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:14 testbox kernel: [17658832.540000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.592000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.592000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.644000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.704000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.712000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:14 testbox kernel: [17658832.724000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.724000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:14 testbox kernel: [17658832.724000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.776000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:14 testbox kernel: [17658832.776000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.828000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.828000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.880000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.888000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658832.940000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:14 testbox kernel: [17658832.948000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:14 testbox kernel: [17658832.960000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658832.960000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:14 testbox kernel: [17658832.960000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658833.012000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:14 testbox kernel: [17658833.012000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:14 testbox kernel: [17658833.064000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:14 testbox kernel: [17658833.064000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.116000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.124000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.176000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.184000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:15 testbox kernel: [17658833.196000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.196000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:15 testbox kernel: [17658833.196000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.248000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:15 testbox kernel: [17658833.248000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.300000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.300000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.352000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.360000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.412000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.420000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:15 testbox kernel: [17658833.432000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.432000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:15 testbox kernel: [17658833.432000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.484000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:15 testbox kernel: [17658833.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.536000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.588000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.648000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.656000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:15 testbox kernel: [17658833.668000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.668000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:15 testbox kernel: [17658833.668000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.720000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:15 testbox kernel: [17658833.720000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.772000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.772000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.824000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.832000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.884000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658833.892000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:15 testbox kernel: [17658833.904000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658833.904000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:15 testbox kernel: [17658833.904000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658833.956000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:15 testbox kernel: [17658833.956000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658834.008000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:15 testbox kernel: [17658834.008000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:15 testbox kernel: [17658834.060000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:15 testbox kernel: [17658834.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.120000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.128000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:16 testbox kernel: [17658834.140000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.140000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:16 testbox kernel: [17658834.140000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.192000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:16 testbox kernel: [17658834.192000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.244000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.244000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.296000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.304000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.356000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.364000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:16 testbox kernel: [17658834.376000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.376000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:16 testbox kernel: [17658834.376000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.428000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:16 testbox kernel: [17658834.428000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.480000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.480000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.532000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.540000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.592000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.600000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:16 testbox kernel: [17658834.612000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.612000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:16 testbox kernel: [17658834.612000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.664000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:16 testbox kernel: [17658834.664000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.716000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.768000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.776000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.828000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658834.836000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:16 testbox kernel: [17658834.848000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.848000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:16 testbox kernel: [17658834.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.900000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:16 testbox kernel: [17658834.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658834.952000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658834.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658835.004000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658835.012000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:16 testbox kernel: [17658835.064000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:16 testbox kernel: [17658835.072000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:16 testbox kernel: [17658835.084000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:16 testbox kernel: [17658835.084000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:16 testbox kernel: [17658835.084000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.136000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:17 testbox kernel: [17658835.136000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.188000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.188000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.240000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.248000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.300000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.308000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:17 testbox kernel: [17658835.320000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.320000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:17 testbox kernel: [17658835.320000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.372000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:17 testbox kernel: [17658835.372000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.424000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.424000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.476000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.536000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.544000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:17 testbox kernel: [17658835.556000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.556000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:17 testbox kernel: [17658835.556000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.608000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:17 testbox kernel: [17658835.608000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.660000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.660000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.712000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.720000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.772000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.780000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:17 testbox kernel: [17658835.792000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.792000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:17 testbox kernel: [17658835.792000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.844000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:17 testbox kernel: [17658835.844000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.896000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658835.896000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658835.948000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658835.956000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658836.008000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:17 testbox kernel: [17658836.016000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:17 testbox kernel: [17658836.028000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:17 testbox kernel: [17658836.028000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:17 testbox kernel: [17658836.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:17 testbox kernel: [17658836.080000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:17 testbox kernel: [17658836.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.132000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.184000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.192000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.244000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.252000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:18 testbox kernel: [17658836.264000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.264000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:18 testbox kernel: [17658836.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.316000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:18 testbox kernel: [17658836.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.368000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.368000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.420000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.428000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.480000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.488000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:18 testbox kernel: [17658836.500000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.500000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:18 testbox kernel: [17658836.500000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.552000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:18 testbox kernel: [17658836.552000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.604000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.604000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.656000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.664000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.716000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.724000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:18 testbox kernel: [17658836.736000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.736000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:18 testbox kernel: [17658836.736000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.788000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:18 testbox kernel: [17658836.788000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.840000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.840000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.892000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658836.952000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:18 testbox kernel: [17658836.960000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:18 testbox kernel: [17658836.972000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658836.972000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:18 testbox kernel: [17658836.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658837.024000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:18 testbox kernel: [17658837.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:18 testbox kernel: [17658837.076000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:18 testbox kernel: [17658837.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.128000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.136000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.188000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.196000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:19 testbox kernel: [17658837.208000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.208000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:19 testbox kernel: [17658837.208000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.260000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:19 testbox kernel: [17658837.260000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.312000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.312000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.364000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.372000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.424000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.432000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:19 testbox kernel: [17658837.444000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.444000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:19 testbox kernel: [17658837.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.496000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:19 testbox kernel: [17658837.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.548000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.548000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.600000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.608000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.660000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.668000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:19 testbox kernel: [17658837.680000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.680000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:19 testbox kernel: [17658837.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.732000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:19 testbox kernel: [17658837.732000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.784000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.784000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.836000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.844000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.896000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658837.904000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:19 testbox kernel: [17658837.916000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658837.916000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:19 testbox kernel: [17658837.916000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658837.968000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:19 testbox kernel: [17658837.968000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658838.020000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:19 testbox kernel: [17658838.020000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:19 testbox kernel: [17658838.072000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:19 testbox kernel: [17658838.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.132000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.140000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:20 testbox kernel: [17658838.152000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.152000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:20 testbox kernel: [17658838.152000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.204000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:20 testbox kernel: [17658838.204000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.256000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.256000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.308000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.368000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.376000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:20 testbox kernel: [17658838.388000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.388000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:20 testbox kernel: [17658838.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.440000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:20 testbox kernel: [17658838.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.492000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.544000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.552000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.604000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.612000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:20 testbox kernel: [17658838.624000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.624000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:20 testbox kernel: [17658838.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.676000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:20 testbox kernel: [17658838.676000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.728000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.728000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.780000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.788000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.840000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658838.848000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:20 testbox kernel: [17658838.860000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.860000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:20 testbox kernel: [17658838.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.912000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:20 testbox kernel: [17658838.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658838.964000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658838.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658839.016000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658839.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:20 testbox kernel: [17658839.076000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:20 testbox kernel: [17658839.084000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:20 testbox kernel: [17658839.096000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:20 testbox kernel: [17658839.096000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:20 testbox kernel: [17658839.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.148000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:21 testbox kernel: [17658839.148000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.200000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.200000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.252000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.260000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.312000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.320000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:21 testbox kernel: [17658839.332000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.332000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:21 testbox kernel: [17658839.332000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.384000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:21 testbox kernel: [17658839.384000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.436000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.436000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.488000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.548000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.556000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:21 testbox kernel: [17658839.568000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.568000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:21 testbox kernel: [17658839.568000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.620000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:21 testbox kernel: [17658839.620000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.672000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.672000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.724000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.732000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.784000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.792000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:21 testbox kernel: [17658839.804000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.804000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:21 testbox kernel: [17658839.804000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.856000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:21 testbox kernel: [17658839.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.908000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658839.908000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658839.960000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658839.968000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658840.020000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:21 testbox kernel: [17658840.028000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:21 testbox kernel: [17658840.040000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:21 testbox kernel: [17658840.040000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:21 testbox kernel: [17658840.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:21 testbox kernel: [17658840.092000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:21 testbox kernel: [17658840.092000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.144000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.144000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.196000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.204000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.256000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.264000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:22 testbox kernel: [17658840.276000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.276000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:22 testbox kernel: [17658840.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.328000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:22 testbox kernel: [17658840.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.380000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.432000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.492000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.500000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:22 testbox kernel: [17658840.512000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.512000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:22 testbox kernel: [17658840.512000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.564000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:22 testbox kernel: [17658840.564000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.616000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.616000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.668000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.676000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.728000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.736000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:22 testbox kernel: [17658840.748000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.748000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:22 testbox kernel: [17658840.748000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.800000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:22 testbox kernel: [17658840.800000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.852000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.852000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.904000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658840.964000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:22 testbox kernel: [17658840.972000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:22 testbox kernel: [17658840.984000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658840.984000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:22 testbox kernel: [17658840.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658841.036000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:22 testbox kernel: [17658841.036000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:22 testbox kernel: [17658841.088000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:22 testbox kernel: [17658841.088000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.140000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.148000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.200000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.208000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:23 testbox kernel: [17658841.220000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.220000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:23 testbox kernel: [17658841.220000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.272000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:23 testbox kernel: [17658841.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.324000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.324000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.376000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.384000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.436000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.444000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:23 testbox kernel: [17658841.456000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.456000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:23 testbox kernel: [17658841.456000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.508000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:23 testbox kernel: [17658841.508000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.560000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.560000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.612000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.620000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.672000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.680000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:23 testbox kernel: [17658841.692000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.692000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:23 testbox kernel: [17658841.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.744000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:23 testbox kernel: [17658841.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.796000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.848000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.908000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658841.916000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:23 testbox kernel: [17658841.928000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658841.928000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:23 testbox kernel: [17658841.928000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658841.980000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:23 testbox kernel: [17658841.980000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658842.032000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:23 testbox kernel: [17658842.032000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:23 testbox kernel: [17658842.084000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:23 testbox kernel: [17658842.092000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.144000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.152000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:24 testbox kernel: [17658842.164000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.164000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:24 testbox kernel: [17658842.164000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.216000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:24 testbox kernel: [17658842.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.268000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.268000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.320000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.380000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.388000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:24 testbox kernel: [17658842.400000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.400000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:24 testbox kernel: [17658842.400000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.452000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:24 testbox kernel: [17658842.452000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.504000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.504000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.556000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.564000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.616000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.624000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:24 testbox kernel: [17658842.636000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.636000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:24 testbox kernel: [17658842.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.688000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:24 testbox kernel: [17658842.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.740000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.792000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.800000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.852000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658842.860000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:24 testbox kernel: [17658842.872000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.872000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:24 testbox kernel: [17658842.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.924000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:24 testbox kernel: [17658842.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658842.976000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:24 testbox kernel: [17658842.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658843.028000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658843.036000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:24 testbox kernel: [17658843.088000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:24 testbox kernel: [17658843.096000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:25 testbox kernel: [17658843.108000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.108000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:25 testbox kernel: [17658843.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.160000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:25 testbox kernel: [17658843.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.212000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.264000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.324000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.332000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:25 testbox kernel: [17658843.344000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.344000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:25 testbox kernel: [17658843.344000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.396000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:25 testbox kernel: [17658843.396000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.448000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.448000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.500000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.508000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.560000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.568000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:25 testbox kernel: [17658843.580000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.580000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:25 testbox kernel: [17658843.580000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.632000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:25 testbox kernel: [17658843.632000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.684000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.684000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.736000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.796000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.804000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:25 testbox kernel: [17658843.816000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.816000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:25 testbox kernel: [17658843.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.868000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:25 testbox kernel: [17658843.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.920000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658843.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658843.972000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658843.980000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658844.032000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:25 testbox kernel: [17658844.040000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:25 testbox kernel: [17658844.052000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:25 testbox kernel: [17658844.052000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:25 testbox kernel: [17658844.052000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:25 testbox kernel: [17658844.104000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:25 testbox kernel: [17658844.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.156000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.208000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.268000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.276000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:26 testbox kernel: [17658844.288000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.288000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:26 testbox kernel: [17658844.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.340000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:26 testbox kernel: [17658844.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.392000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.444000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.452000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.504000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.512000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:26 testbox kernel: [17658844.524000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.524000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:26 testbox kernel: [17658844.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.576000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:26 testbox kernel: [17658844.576000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.628000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.680000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.740000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.748000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:26 testbox kernel: [17658844.760000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.760000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:26 testbox kernel: [17658844.760000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.812000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:26 testbox kernel: [17658844.812000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.864000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.864000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.916000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658844.976000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:26 testbox kernel: [17658844.984000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:26 testbox kernel: [17658844.996000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658844.996000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:26 testbox kernel: [17658844.996000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658845.048000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:26 testbox kernel: [17658845.048000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:26 testbox kernel: [17658845.100000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:26 testbox kernel: [17658845.100000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.152000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.212000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.220000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:27 testbox kernel: [17658845.232000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.232000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:27 testbox kernel: [17658845.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.284000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:27 testbox kernel: [17658845.284000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.336000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.388000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.396000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.448000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.456000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:27 testbox kernel: [17658845.468000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.468000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:27 testbox kernel: [17658845.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.520000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:27 testbox kernel: [17658845.520000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.572000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.624000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.632000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.684000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.692000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:27 testbox kernel: [17658845.704000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.704000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:27 testbox kernel: [17658845.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.756000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:27 testbox kernel: [17658845.756000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.808000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.860000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.920000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658845.928000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:27 testbox kernel: [17658845.940000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658845.940000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:27 testbox kernel: [17658845.940000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658845.992000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:27 testbox kernel: [17658845.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658846.044000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:27 testbox kernel: [17658846.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:27 testbox kernel: [17658846.096000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:27 testbox kernel: [17658846.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.156000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.164000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:28 testbox kernel: [17658846.176000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.176000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:28 testbox kernel: [17658846.176000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.228000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:28 testbox kernel: [17658846.228000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.280000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.280000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.332000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.392000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.400000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:28 testbox kernel: [17658846.412000] stb0899_check_data: ------------------------>VSTATUS=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.412000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.412000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:28 testbox kernel: [17658846.412000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.464000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:28 testbox kernel: [17658846.464000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.516000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.568000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.576000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.628000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.636000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:28 testbox kernel: [17658846.636000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.636000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:28 testbox kernel: [17658846.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.688000] mantis_i2c_write (1): Data<W[1]>=[0x33]
Oct 30 15:44:28 testbox kernel: [17658846.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.740000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.792000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.800000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.852000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.860000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:28 testbox kernel: [17658846.860000] stb0899_set_delsys: Set Frontend Type
Oct 30 15:44:28 testbox kernel: [17658846.860000] stb0899_write_reg: Norm Write buf=[f4 0e 00 28]
Oct 30 15:44:28 testbox kernel: [17658846.860000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658846.860000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:28 testbox kernel: [17658846.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.912000] mantis_i2c_write (1): Data<W[1]>=[0x0e]
Oct 30 15:44:28 testbox kernel: [17658846.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658846.964000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:28 testbox kernel: [17658846.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658847.016000] stb0899_write_reg: Norm Write buf=[f5 83 00 28]
Oct 30 15:44:28 testbox kernel: [17658847.016000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:28 testbox kernel: [17658847.016000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:28 testbox kernel: [17658847.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:28 testbox kernel: [17658847.068000] mantis_i2c_write (1): Data<W[1]>=[0x83]
Oct 30 15:44:28 testbox kernel: [17658847.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.120000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658847.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.172000] stb0899_write_reg: Norm Write buf=[f5 30 06 28]
Oct 30 15:44:29 testbox kernel: [17658847.172000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:29 testbox kernel: [17658847.172000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:29 testbox kernel: [17658847.172000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.224000] mantis_i2c_write (1): Data<W[1]>=[0x30]
Oct 30 15:44:29 testbox kernel: [17658847.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.276000] mantis_i2c_write (1): Data<W[2]>=[0x06]
Oct 30 15:44:29 testbox kernel: [17658847.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.328000] stb0899_write_reg: Norm Write buf=[f5 3c 3f 28]
Oct 30 15:44:29 testbox kernel: [17658847.328000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:29 testbox kernel: [17658847.328000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:29 testbox kernel: [17658847.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.380000] mantis_i2c_write (1): Data<W[1]>=[0x3c]
Oct 30 15:44:29 testbox kernel: [17658847.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.432000] mantis_i2c_write (1): Data<W[2]>=[0x3f]
Oct 30 15:44:29 testbox kernel: [17658847.432000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.484000] stb0899_write_reg: Norm Write buf=[f5 3d 19 28]
Oct 30 15:44:29 testbox kernel: [17658847.484000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:29 testbox kernel: [17658847.484000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:29 testbox kernel: [17658847.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.536000] mantis_i2c_write (1): Data<W[1]>=[0x3d]
Oct 30 15:44:29 testbox kernel: [17658847.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.588000] mantis_i2c_write (1): Data<W[2]>=[0x19]
Oct 30 15:44:29 testbox kernel: [17658847.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.640000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:29 testbox kernel: [17658847.640000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:44:29 testbox kernel: [17658847.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.692000] mantis_i2c_write (1): Data<W[1]>=[0xfc]
Oct 30 15:44:29 testbox kernel: [17658847.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.744000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658847.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.796000] mantis_i2c_write (1): Data<W[3]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658847.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.848000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658847.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.900000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658847.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658847.952000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:29 testbox kernel: [17658847.952000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:44:29 testbox kernel: [17658847.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658848.004000] mantis_i2c_write (1): Data<W[1]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658848.004000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:29 testbox kernel: [17658848.056000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:29 testbox kernel: [17658848.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.108000] mantis_i2c_write (1): Data<W[3]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.160000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.212000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.264000] stb0899_set_delsys: DVB-S Freq = 1185000, Symbol Rate = 27500000
Oct 30 15:44:30 testbox kernel: [17658848.264000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:30 testbox kernel: [17658848.264000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:30 testbox kernel: [17658848.264000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.316000] mantis_i2c_write (1): Data<W[1]>=[0xb3]
Oct 30 15:44:30 testbox kernel: [17658848.316000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.368000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:30 testbox kernel: [17658848.368000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.420000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.428000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.480000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.488000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:30 testbox kernel: [17658848.488000] stb0899_init_calc: Master Clock = [4500000]
Oct 30 15:44:30 testbox kernel: [17658848.488000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:30 testbox kernel: [17658848.488000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:30 testbox kernel: [17658848.488000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.540000] mantis_i2c_write (1): Data<W[1]>=[0x0e]
Oct 30 15:44:30 testbox kernel: [17658848.540000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.592000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:30 testbox kernel: [17658848.592000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.644000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.704000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.712000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:30 testbox kernel: [17658848.712000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:30 testbox kernel: [17658848.712000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:44:30 testbox kernel: [17658848.712000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.764000] mantis_i2c_write (1): Data<W[1]>=[0xfc]
Oct 30 15:44:30 testbox kernel: [17658848.764000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.816000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.868000] mantis_i2c_write (1): Data<W[3]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.920000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.920000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658848.972000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:44:30 testbox kernel: [17658848.972000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658849.024000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:30 testbox kernel: [17658849.024000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:44:30 testbox kernel: [17658849.024000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:30 testbox kernel: [17658849.076000] mantis_i2c_write (1): Data<W[1]>=[0x20]
Oct 30 15:44:30 testbox kernel: [17658849.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.128000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.128000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.180000] mantis_i2c_write (1): Data<W[3]>=[0x40]
Oct 30 15:44:31 testbox kernel: [17658849.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.232000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.232000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.284000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.284000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.336000] stb0899_read_s2reg: Device=[0xf40e], Offset=[0xf35c]
Oct 30 15:44:31 testbox kernel: [17658849.336000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:31 testbox kernel: [17658849.336000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:31 testbox kernel: [17658849.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.388000] mantis_i2c_write (1): Data<W[1]>=[0x0e]
Oct 30 15:44:31 testbox kernel: [17658849.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.440000] mantis_i2c_write (1): Data<W[2]>=[0x20]
Oct 30 15:44:31 testbox kernel: [17658849.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.492000] mantis_i2c_write (1): Data<W[3]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.544000] mantis_i2c_write (1): Data<W[4]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.596000] mantis_i2c_write (1): Data<W[5]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.648000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:31 testbox kernel: [17658849.648000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:44:31 testbox kernel: [17658849.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.700000] mantis_i2c_write (1): Data<W[1]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.700000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.752000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:31 testbox kernel: [17658849.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.804000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.812000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.864000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.924000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.932000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658849.984000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:44:31 testbox kernel: [17658849.992000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:31 testbox kernel: [17658849.992000] mantis_i2c_write (1): Data<W[0]>=[0xf3]
Oct 30 15:44:31 testbox kernel: [17658849.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658850.044000] mantis_i2c_write (1): Data<W[1]>=[0x5c]
Oct 30 15:44:31 testbox kernel: [17658850.044000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:31 testbox kernel: [17658850.096000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:31 testbox kernel: [17658850.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.148000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:32 testbox kernel: [17658850.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.208000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:32 testbox kernel: [17658850.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.268000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:44:32 testbox kernel: [17658850.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.328000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:44:32 testbox kernel: [17658850.336000] stb0899_read_s2reg: S2 Read buf=[00 00 00 00]
Oct 30 15:44:32 testbox kernel: [17658850.336000] stb0899_set_delsys: Params--------->IN Range
Oct 30 15:44:32 testbox kernel: [17658850.336000] stb0899_write_reg: Norm Write buf=[f1 b3 18 00]
Oct 30 15:44:32 testbox kernel: [17658850.336000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:32 testbox kernel: [17658850.336000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:32 testbox kernel: [17658850.336000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.388000] mantis_i2c_write (1): Data<W[1]>=[0xb3]
Oct 30 15:44:32 testbox kernel: [17658850.388000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.440000] mantis_i2c_write (1): Data<W[2]>=[0x18]
Oct 30 15:44:32 testbox kernel: [17658850.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.492000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:32 testbox kernel: [17658850.492000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:32 testbox kernel: [17658850.492000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.544000] mantis_i2c_write (1): Data<W[1]>=[0xb3]
Oct 30 15:44:32 testbox kernel: [17658850.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.596000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:32 testbox kernel: [17658850.596000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.648000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:32 testbox kernel: [17658850.656000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.708000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:32 testbox kernel: [17658850.716000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:32 testbox kernel: [17658850.716000] stb0899_write_reg: Norm Write buf=[f5 33 08 e0]
Oct 30 15:44:32 testbox kernel: [17658850.716000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:32 testbox kernel: [17658850.716000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:32 testbox kernel: [17658850.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.768000] mantis_i2c_write (1): Data<W[1]>=[0x33]
Oct 30 15:44:32 testbox kernel: [17658850.768000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.820000] mantis_i2c_write (1): Data<W[2]>=[0x08]
Oct 30 15:44:32 testbox kernel: [17658850.820000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.872000] stb0899_write_reg: Norm Write buf=[f5 48 b1 e0]
Oct 30 15:44:32 testbox kernel: [17658850.872000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:32 testbox kernel: [17658850.872000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:32 testbox kernel: [17658850.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.924000] mantis_i2c_write (1): Data<W[1]>=[0x48]
Oct 30 15:44:32 testbox kernel: [17658850.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658850.976000] mantis_i2c_write (1): Data<W[2]>=[0xb1]
Oct 30 15:44:32 testbox kernel: [17658850.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658851.028000] stb0899_write_reg: Norm Write buf=[f5 49 40 e0]
Oct 30 15:44:32 testbox kernel: [17658851.028000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:32 testbox kernel: [17658851.028000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:32 testbox kernel: [17658851.028000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:32 testbox kernel: [17658851.080000] mantis_i2c_write (1): Data<W[1]>=[0x49]
Oct 30 15:44:32 testbox kernel: [17658851.080000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.132000] mantis_i2c_write (1): Data<W[2]>=[0x40]
Oct 30 15:44:33 testbox kernel: [17658851.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.184000] stb0899_write_reg: Norm Write buf=[f5 4a 42 e0]
Oct 30 15:44:33 testbox kernel: [17658851.184000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:33 testbox kernel: [17658851.184000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:33 testbox kernel: [17658851.184000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.236000] mantis_i2c_write (1): Data<W[1]>=[0x4a]
Oct 30 15:44:33 testbox kernel: [17658851.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.288000] mantis_i2c_write (1): Data<W[2]>=[0x42]
Oct 30 15:44:33 testbox kernel: [17658851.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.340000] stb0899_write_reg: Norm Write buf=[f5 4b 12 e0]
Oct 30 15:44:33 testbox kernel: [17658851.340000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:33 testbox kernel: [17658851.340000] mantis_i2c_write (1): Data<W[0]>=[0xf5]
Oct 30 15:44:33 testbox kernel: [17658851.340000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.392000] mantis_i2c_write (1): Data<W[1]>=[0x4b]
Oct 30 15:44:33 testbox kernel: [17658851.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.444000] mantis_i2c_write (1): Data<W[2]>=[0x12]
Oct 30 15:44:33 testbox kernel: [17658851.444000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.496000] stb0899_write_reg: Norm Write buf=[f1 57 11 e0]
Oct 30 15:44:33 testbox kernel: [17658851.496000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:33 testbox kernel: [17658851.496000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:33 testbox kernel: [17658851.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.548000] mantis_i2c_write (1): Data<W[1]>=[0x57]
Oct 30 15:44:33 testbox kernel: [17658851.548000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.600000] mantis_i2c_write (1): Data<W[2]>=[0x11]
Oct 30 15:44:33 testbox kernel: [17658851.600000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.652000] stb0899_set_delsys: Set to DVB S Mode
Oct 30 15:44:33 testbox kernel: [17658851.652000] stb0899_write_reg: Norm Write buf=[f4 4c fd 10]
Oct 30 15:44:33 testbox kernel: [17658851.652000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:33 testbox kernel: [17658851.652000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:33 testbox kernel: [17658851.652000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.704000] mantis_i2c_write (1): Data<W[1]>=[0x4c]
Oct 30 15:44:33 testbox kernel: [17658851.704000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.756000] mantis_i2c_write (1): Data<W[2]>=[0xfd]
Oct 30 15:44:33 testbox kernel: [17658851.756000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.808000] stb0899_write_reg: Norm Write buf=[f4 4d b1 10]
Oct 30 15:44:33 testbox kernel: [17658851.808000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:33 testbox kernel: [17658851.808000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:33 testbox kernel: [17658851.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.860000] mantis_i2c_write (1): Data<W[1]>=[0x4d]
Oct 30 15:44:33 testbox kernel: [17658851.860000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.912000] mantis_i2c_write (1): Data<W[2]>=[0xb1]
Oct 30 15:44:33 testbox kernel: [17658851.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658851.964000] stb0899_write_reg: Norm Write buf=[f4 4e 00 00]
Oct 30 15:44:33 testbox kernel: [17658851.964000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:33 testbox kernel: [17658851.964000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:33 testbox kernel: [17658851.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658852.016000] mantis_i2c_write (1): Data<W[1]>=[0x4e]
Oct 30 15:44:33 testbox kernel: [17658852.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:33 testbox kernel: [17658852.068000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:33 testbox kernel: [17658852.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.120000] stb0899_write_reg: Norm Write buf=[f4 46 fd 00]
Oct 30 15:44:34 testbox kernel: [17658852.120000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658852.120000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:34 testbox kernel: [17658852.120000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.172000] mantis_i2c_write (1): Data<W[1]>=[0x46]
Oct 30 15:44:34 testbox kernel: [17658852.172000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.224000] mantis_i2c_write (1): Data<W[2]>=[0xfd]
Oct 30 15:44:34 testbox kernel: [17658852.224000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.276000] stb0899_write_reg: Norm Write buf=[f4 47 ca 00]
Oct 30 15:44:34 testbox kernel: [17658852.276000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658852.276000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:34 testbox kernel: [17658852.276000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.328000] mantis_i2c_write (1): Data<W[1]>=[0x47]
Oct 30 15:44:34 testbox kernel: [17658852.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.380000] mantis_i2c_write (1): Data<W[2]>=[0xca]
Oct 30 15:44:34 testbox kernel: [17658852.380000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.432000] stb0899_write_reg: Norm Write buf=[f4 48 03 00]
Oct 30 15:44:34 testbox kernel: [17658852.432000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658852.432000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:34 testbox kernel: [17658852.432000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.484000] mantis_i2c_write (1): Data<W[1]>=[0x48]
Oct 30 15:44:34 testbox kernel: [17658852.484000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.536000] mantis_i2c_write (1): Data<W[2]>=[0x03]
Oct 30 15:44:34 testbox kernel: [17658852.536000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.588000] stb0899_algo: CRLOOP: Srate < 30000000
Oct 30 15:44:34 testbox kernel: [17658852.588000] stb0899_write_reg: Norm Write buf=[f4 1d 27 00]
Oct 30 15:44:34 testbox kernel: [17658852.588000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658852.588000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:34 testbox kernel: [17658852.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.640000] mantis_i2c_write (1): Data<W[1]>=[0x1d]
Oct 30 15:44:34 testbox kernel: [17658852.640000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.692000] mantis_i2c_write (1): Data<W[2]>=[0x27]
Oct 30 15:44:34 testbox kernel: [17658852.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.744000] stb0899_algo: Internal Srate=27500000, Internal MCLK=68
Oct 30 15:44:34 testbox kernel: [17658852.744000] stb0899_algo: STB0899 Multistandard has a STB6100 Silicon Tuner
Oct 30 15:44:34 testbox kernel: [17658852.744000] stb0899_write_reg: Norm Write buf=[ff 11 40 00]
Oct 30 15:44:34 testbox kernel: [17658852.744000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658852.744000] mantis_i2c_write (1): Data<W[0]>=[0xff]
Oct 30 15:44:34 testbox kernel: [17658852.744000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.796000] mantis_i2c_write (1): Data<W[1]>=[0x11]
Oct 30 15:44:34 testbox kernel: [17658852.796000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.848000] mantis_i2c_write (1): Data<W[2]>=[0x40]
Oct 30 15:44:34 testbox kernel: [17658852.848000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.900000] stb0899_first_subrange: max_subrange = 8937500
Oct 30 15:44:34 testbox kernel: [17658852.900000] stb0899_algo: ALGO Loop
Oct 30 15:44:34 testbox kernel: [17658852.900000] stb0899_write_reg: Norm Write buf=[f4 3e 00 1c]
Oct 30 15:44:34 testbox kernel: [17658852.900000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658852.900000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:34 testbox kernel: [17658852.900000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658852.952000] mantis_i2c_write (1): Data<W[1]>=[0x3e]
Oct 30 15:44:34 testbox kernel: [17658852.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658853.004000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:34 testbox kernel: [17658853.004000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:34 testbox kernel: [17658853.056000] stb0899_write_reg: Norm Write buf=[f4 3f 00 1c]
Oct 30 15:44:34 testbox kernel: [17658853.056000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:34 testbox kernel: [17658853.056000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:34 testbox kernel: [17658853.056000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.108000] mantis_i2c_write (1): Data<W[1]>=[0x3f]
Oct 30 15:44:35 testbox kernel: [17658853.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.160000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:35 testbox kernel: [17658853.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.216000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:35 testbox kernel: [17658853.216000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:35 testbox kernel: [17658853.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.272000] mantis_i2c_write (1): Data<W[1]>=[0x1b]
Oct 30 15:44:35 testbox kernel: [17658853.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.328000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:35 testbox kernel: [17658853.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.380000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:35 testbox kernel: [17658853.396000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.444000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:35 testbox kernel: [17658853.456000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:35 testbox kernel: [17658853.460000] stb0899_write_reg: Norm Write buf=[f4 1b 80 1c]
Oct 30 15:44:35 testbox kernel: [17658853.460000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:35 testbox kernel: [17658853.460000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:35 testbox kernel: [17658853.460000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.516000] mantis_i2c_write (1): Data<W[1]>=[0x1b]
Oct 30 15:44:35 testbox kernel: [17658853.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.572000] mantis_i2c_write (1): Data<W[2]>=[0x80]
Oct 30 15:44:35 testbox kernel: [17658853.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.628000] stb0899_algo: Enabling I2C repeater for STB6100 Silicon Tuner
Oct 30 15:44:35 testbox kernel: [17658853.628000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:35 testbox kernel: [17658853.628000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:35 testbox kernel: [17658853.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.684000] mantis_i2c_write (1): Data<W[1]>=[0x2a]
Oct 30 15:44:35 testbox kernel: [17658853.684000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.740000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:35 testbox kernel: [17658853.740000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.792000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:35 testbox kernel: [17658853.808000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.856000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:35 testbox kernel: [17658853.868000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:35 testbox kernel: [17658853.872000] stb0899_i2c_gate_ctrl: Enabling I2C Repeater ...
Oct 30 15:44:35 testbox kernel: [17658853.872000] stb0899_write_reg: Norm Write buf=[f1 2a 80 00]
Oct 30 15:44:35 testbox kernel: [17658853.872000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:35 testbox kernel: [17658853.872000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:35 testbox kernel: [17658853.872000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.928000] mantis_i2c_write (1): Data<W[1]>=[0x2a]
Oct 30 15:44:35 testbox kernel: [17658853.928000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658853.984000] mantis_i2c_write (1): Data<W[2]>=[0x80]
Oct 30 15:44:35 testbox kernel: [17658853.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658854.040000] stb0899_algo: Set Frequency: Using tuner=[STB6100 Silicon Tuner]
Oct 30 15:44:35 testbox kernel: [17658854.040000] stb6100_set_state: Set TUNER frequency frequency=[1185000] reference clock=[27000000]
Oct 30 15:44:35 testbox kernel: [17658854.040000] stb6100_set_frequency: Reading from registers
Oct 30 15:44:35 testbox kernel: [17658854.040000] mantis_i2c_read (1): Address=[0x60]
Oct 30 15:44:35 testbox kernel: [17658854.040000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:35 testbox kernel: [17658854.092000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.108000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.156000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.168000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.216000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.228000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.276000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.288000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.336000] mantis_i2c_read (1): Data<R[4]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.348000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.396000] mantis_i2c_read (1): Data<R[5]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.408000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.456000] mantis_i2c_read (1): Data<R[6]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.516000] mantis_i2c_read (1): Data<R[7]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.528000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.576000] mantis_i2c_read (1): Data<R[8]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.588000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.636000] mantis_i2c_read (1): Data<R[9]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.648000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.696000] mantis_i2c_read (1): Data<R[10]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.708000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.756000] mantis_i2c_read (1): Data<R[11]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.764000] stb6100_read_regs: Read [0x60] LD:0x00
Oct 30 15:44:36 testbox kernel: [17658854.764000] stb6100_read_regs: Read [0x60] VCO:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] NI:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] NF:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] K:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] G:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] F:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] DLB:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] TEST1:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] FCCK:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] LPEN:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_read_regs: Read [0x60] TEST3:0x00
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: Frequency IN RANGE
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: fvco=[2370000] Reference=[27000000] psd2=[0]
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: frequency = 1185000, g = 192, odiv = 0, psd2 = 0, fxtal = 192, osm = 0, fvco = 2370000, N(I) = 0, N(F) = 0
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: frequency=1185000
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: g = 192
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: odiv = 0
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: psd2 = 0
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: fxtal = 27000000
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: osm = 0
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: fvco = 2370000
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: N(I) = 0
Oct 30 15:44:36 testbox kernel: [17658854.768000] stb6100_set_frequency: N(F) = 45
Oct 30 15:44:36 testbox kernel: [17658854.768000] Write to (0x60) [1:11]: XXX:XX
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         VCO:80
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         NI:00
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         NF:2d
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         K:38
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         G:3e
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         F:c0
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         DLB:c4
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         TEST1:8f
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         FCCK:4d
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         LPEN:eb
Oct 30 15:44:36 testbox kernel: [17658854.768000]                         TEST3:de
Oct 30 15:44:36 testbox kernel: [17658854.768000] mantis_i2c_write (1): Address=[0x60]
Oct 30 15:44:36 testbox kernel: [17658854.768000] mantis_i2c_write (1): Data<W[0]>=[0x01]
Oct 30 15:44:36 testbox kernel: [17658854.768000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.824000] mantis_i2c_write (1): Data<W[1]>=[0x80]
Oct 30 15:44:36 testbox kernel: [17658854.824000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.880000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:36 testbox kernel: [17658854.880000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.936000] mantis_i2c_write (1): Data<W[3]>=[0x2d]
Oct 30 15:44:36 testbox kernel: [17658854.936000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658854.992000] mantis_i2c_write (1): Data<W[4]>=[0x38]
Oct 30 15:44:36 testbox kernel: [17658854.992000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658855.048000] mantis_i2c_write (1): Data<W[5]>=[0x3e]
Oct 30 15:44:36 testbox kernel: [17658855.048000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:36 testbox kernel: [17658855.104000] mantis_i2c_write (1): Data<W[6]>=[0xc0]
Oct 30 15:44:37 testbox kernel: [17658855.104000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.160000] mantis_i2c_write (1): Data<W[7]>=[0xc4]
Oct 30 15:44:37 testbox kernel: [17658855.160000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.216000] mantis_i2c_write (1): Data<W[8]>=[0x8f]
Oct 30 15:44:37 testbox kernel: [17658855.216000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.272000] mantis_i2c_write (1): Data<W[9]>=[0x4d]
Oct 30 15:44:37 testbox kernel: [17658855.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.328000] mantis_i2c_write (1): Data<W[10]>=[0xeb]
Oct 30 15:44:37 testbox kernel: [17658855.328000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.384000] mantis_i2c_write (1): Data<W[11]>=[0xde]
Oct 30 15:44:37 testbox kernel: [17658855.384000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.440000] Write to (0x60) [10:1]: XXX:XX
Oct 30 15:44:37 testbox kernel: [17658855.440000]                         LPEN:fb
Oct 30 15:44:37 testbox kernel: [17658855.440000] mantis_i2c_write (1): Address=[0x60]
Oct 30 15:44:37 testbox kernel: [17658855.440000] mantis_i2c_write (1): Data<W[0]>=[0x0a]
Oct 30 15:44:37 testbox kernel: [17658855.440000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.496000] mantis_i2c_write (1): Data<W[1]>=[0xfb]
Oct 30 15:44:37 testbox kernel: [17658855.496000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.564000] Write to (0x60) [1:1]: XXX:XX
Oct 30 15:44:37 testbox kernel: [17658855.564000]                         VCO:60
Oct 30 15:44:37 testbox kernel: [17658855.564000] mantis_i2c_write (1): Address=[0x60]
Oct 30 15:44:37 testbox kernel: [17658855.568000] mantis_i2c_write (1): Data<W[0]>=[0x01]
Oct 30 15:44:37 testbox kernel: [17658855.568000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.624000] mantis_i2c_write (1): Data<W[1]>=[0x60]
Oct 30 15:44:37 testbox kernel: [17658855.624000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.680000] Write to (0x60) [9:1]: XXX:XX
Oct 30 15:44:37 testbox kernel: [17658855.680000]                         FCCK:0d
Oct 30 15:44:37 testbox kernel: [17658855.680000] mantis_i2c_write (1): Address=[0x60]
Oct 30 15:44:37 testbox kernel: [17658855.680000] mantis_i2c_write (1): Data<W[0]>=[0x09]
Oct 30 15:44:37 testbox kernel: [17658855.680000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.736000] mantis_i2c_write (1): Data<W[1]>=[0x0d]
Oct 30 15:44:37 testbox kernel: [17658855.736000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.792000] mantis_i2c_read (1): Address=[0x60]
Oct 30 15:44:37 testbox kernel: [17658855.792000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.844000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:37 testbox kernel: [17658855.856000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.904000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:37 testbox kernel: [17658855.916000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658855.964000] mantis_i2c_read (1): Data<R[2]>=[0x00]
Oct 30 15:44:37 testbox kernel: [17658855.976000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658856.024000] mantis_i2c_read (1): Data<R[3]>=[0x00]
Oct 30 15:44:37 testbox kernel: [17658856.036000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:37 testbox kernel: [17658856.084000] mantis_i2c_read (1): Data<R[4]>=[0x00]
Oct 30 15:44:37 testbox kernel: [17658856.096000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.144000] mantis_i2c_read (1): Data<R[5]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.156000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.204000] mantis_i2c_read (1): Data<R[6]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.212000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.264000] mantis_i2c_read (1): Data<R[7]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.272000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.324000] mantis_i2c_read (1): Data<R[8]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.332000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.384000] mantis_i2c_read (1): Data<R[9]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.392000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.444000] mantis_i2c_read (1): Data<R[10]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.452000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.504000] mantis_i2c_read (1): Data<R[11]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.512000] stb6100_read_regs: Read [0x60] LD:0x00
Oct 30 15:44:38 testbox kernel: [17658856.512000] stb6100_read_regs: Read [0x60] VCO:0x00
Oct 30 15:44:38 testbox kernel: [17658856.512000] stb6100_read_regs: Read [0x60] NI:0x00
Oct 30 15:44:38 testbox kernel: [17658856.512000] stb6100_read_regs: Read [0x60] NF:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] K:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] G:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] F:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] DLB:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] TEST1:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] FCCK:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] LPEN:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_read_regs: Read [0x60] TEST3:0x00
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb6100_get_frequency: frequency = 0 kHz, odiv = 0, psd2 = 0, fxtal = 27000000 kHz, fvco = 0 kHz, N(I) = 0, N(F) = 0
Oct 30 15:44:38 testbox kernel: [17658856.516000] stb0899_algo: Disabling I2C repeater for STB6100 Silicon Tuner
Oct 30 15:44:38 testbox kernel: [17658856.516000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:38 testbox kernel: [17658856.516000] mantis_i2c_write (1): Data<W[0]>=[0xf1]
Oct 30 15:44:38 testbox kernel: [17658856.516000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.572000] mantis_i2c_write (1): Data<W[1]>=[0x2a]
Oct 30 15:44:38 testbox kernel: [17658856.572000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.628000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:38 testbox kernel: [17658856.628000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.680000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.688000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.740000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:38 testbox kernel: [17658856.748000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:38 testbox kernel: [17658856.908000] stb0899_write_reg: Norm Write buf=[f4 39 f2 00]
Oct 30 15:44:38 testbox kernel: [17658856.908000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:38 testbox kernel: [17658856.908000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:38 testbox kernel: [17658856.912000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658856.964000] mantis_i2c_write (1): Data<W[1]>=[0x39]
Oct 30 15:44:38 testbox kernel: [17658856.964000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658857.020000] mantis_i2c_write (1): Data<W[2]>=[0xf2]
Oct 30 15:44:38 testbox kernel: [17658857.020000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:38 testbox kernel: [17658857.076000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:38 testbox kernel: [17658857.076000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:38 testbox kernel: [17658857.076000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.132000] mantis_i2c_write (1): Data<W[1]>=[0x27]
Oct 30 15:44:39 testbox kernel: [17658857.132000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.188000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.188000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.240000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.248000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.300000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.308000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:39 testbox kernel: [17658857.308000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.308000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:39 testbox kernel: [17658857.312000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.364000] mantis_i2c_write (1): Data<W[1]>=[0x38]
Oct 30 15:44:39 testbox kernel: [17658857.364000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.420000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.420000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.472000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.480000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.532000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.540000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:39 testbox kernel: [17658857.540000] stb0899_check_tmg: Timing Lock Indicator reg (TLIR)=[0], Threshold=[0]
Oct 30 15:44:39 testbox kernel: [17658857.540000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.540000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:39 testbox kernel: [17658857.544000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.600000] mantis_i2c_write (1): Data<W[1]>=[0x39]
Oct 30 15:44:39 testbox kernel: [17658857.600000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.656000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.656000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.708000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.716000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.768000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.776000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:39 testbox kernel: [17658857.776000] stb0899_check_tmg: Frontend Timing Error
Oct 30 15:44:39 testbox kernel: [17658857.776000] stb0899_next_subrange: Frequency = [1185000]
Oct 30 15:44:39 testbox kernel: [17658857.776000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.776000] mantis_i2c_write (1): Data<W[0]>=[0xff]
Oct 30 15:44:39 testbox kernel: [17658857.780000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.836000] mantis_i2c_write (1): Data<W[1]>=[0x11]
Oct 30 15:44:39 testbox kernel: [17658857.836000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.892000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658857.892000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658857.944000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658857.952000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658858.004000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:39 testbox kernel: [17658858.012000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:39 testbox kernel: [17658858.012000] stb0899_write_reg: Norm Write buf=[ff 11 00 00]
Oct 30 15:44:39 testbox kernel: [17658858.012000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:39 testbox kernel: [17658858.012000] mantis_i2c_write (1): Data<W[0]>=[0xff]
Oct 30 15:44:39 testbox kernel: [17658858.016000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:39 testbox kernel: [17658858.068000] mantis_i2c_write (1): Data<W[1]>=[0x11]
Oct 30 15:44:39 testbox kernel: [17658858.068000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.124000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.124000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.180000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.180000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:40 testbox kernel: [17658858.180000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.236000] mantis_i2c_write (1): Data<W[1]>=[0x1b]
Oct 30 15:44:40 testbox kernel: [17658858.236000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.292000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.292000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.344000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.352000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.404000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.412000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:40 testbox kernel: [17658858.412000] stb0899_write_reg: Norm Write buf=[f4 1b 00 00]
Oct 30 15:44:40 testbox kernel: [17658858.412000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.412000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:40 testbox kernel: [17658858.416000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.468000] mantis_i2c_write (1): Data<W[1]>=[0x1b]
Oct 30 15:44:40 testbox kernel: [17658858.468000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.524000] mantis_i2c_write (1): Data<W[2]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.524000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.580000] stb0899_set_delsys: Search failed
Oct 30 15:44:40 testbox kernel: [17658858.580000] stb0899_read_signal_strength: Delivery system - DVB-S
Oct 30 15:44:40 testbox kernel: [17658858.580000] stb0899_read_signal_strength: Delivery system - DSS
Oct 30 15:44:40 testbox kernel: [17658858.580000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.580000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:40 testbox kernel: [17658858.580000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.636000] mantis_i2c_write (1): Data<W[1]>=[0x2e]
Oct 30 15:44:40 testbox kernel: [17658858.636000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.692000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.692000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.744000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.752000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.804000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.812000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:40 testbox kernel: [17658858.812000] stb0899_read_signal_strength: Reading from table -- 
Oct 30 15:44:40 testbox kernel: [17658858.812000] mantis_i2c_write (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.812000] mantis_i2c_write (1): Data<W[0]>=[0xf4]
Oct 30 15:44:40 testbox kernel: [17658858.816000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.868000] mantis_i2c_write (1): Data<W[1]>=[0x3a]
Oct 30 15:44:40 testbox kernel: [17658858.868000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.924000] mantis_i2c_read (1): Address=[0x68]
Oct 30 15:44:40 testbox kernel: [17658858.924000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658858.976000] mantis_i2c_read (1): Data<R[0]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658858.984000] === Interrupts[f8000001/0003]=6 [* DMA enabl ** I2C DONE  *] ===
Oct 30 15:44:40 testbox kernel: [17658859.036000] mantis_i2c_read (1): Data<R[1]>=[0x00]
Oct 30 15:44:40 testbox kernel: [17658859.044000] stb0899_read_reg: Norm Read buf=[00 00]
Oct 30 15:44:41 testbox kernel: [17658859.776000] mantis_dvb_stop_feed (1): Mantis DVB Stop feed
Oct 30 15:44:41 testbox kernel: [17658859.776000] mantis_dvb_stop_feed (1): Mantis DVB Stop feed
Oct 30 15:44:41 testbox kernel: [17658859.776000] mantis_dvb_stop_feed (1): mantis stop feed and dma
Oct 30 15:44:41 testbox kernel: [17658859.776000] mantis stop feed and dma
Oct 30 15:44:41 testbox kernel: [17658859.776000] mantis_dma_stop (1): Mantis Stop DMA engine