Stuff

diff --git a/pscnv/nouveau_drv.c b/pscnv/nouveau_drv.cindex a58f79a..5beebf1 100644--- a/pscnv/nouveau_drv.c+++ b/pscnv/nouveau_drv.c@@ -495,6 +495,7 @@ struct drm_ioctl_desc nouveau_ioctls[] = { 	DRM_IOCTL_DEF(DRM_PSCNV_FIFO_INIT, pscnv_ioctl_fifo_init, DRM_UNLOCKED), 	DRM_IOCTL_DEF(DRM_PSCNV_OBJ_ENG_NEW, pscnv_ioctl_obj_eng_new, DRM_UNLOCKED), 	DRM_IOCTL_DEF(DRM_PSCNV_FIFO_INIT_IB, pscnv_ioctl_fifo_init_ib, DRM_UNLOCKED),+	DRM_IOCTL_DEF(DRM_PSCNV_CORE_CLOCK, pscnv_ioctl_core_clock, DRM_UNLOCKED), };  int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls);diff --git a/pscnv/nv50_fifo.c b/pscnv/nv50_fifo.cindex 505bb40..9273061 100644--- a/pscnv/nv50_fifo.c+++ b/pscnv/nv50_fifo.c@@ -298,6 +298,17 @@ int pscnv_ioctl_fifo_init(struct drm_device *dev, void *data, 	return 0; } +int pscnv_ioctl_core_clock(struct drm_device *dev, void *data, +						struct drm_file *file_priv) {+	uint32_t core_first_dword = nv_rd32(dev, 0x4028);+	uint32_t core_second_dword = nv_rd32(dev, 0x402c);+	if (core_first_dword << 31 == 0)+		return 1; /* PLL is not set */+	struct drm_pscnv_clocks *clocks = data;++	return 0;+}+ int pscnv_ioctl_fifo_init_ib(struct drm_device *dev, void *data, 						struct drm_file *file_priv) { 	struct drm_pscnv_fifo_init_ib *req = data;diff --git a/pscnv/pscnv_drm.h b/pscnv/pscnv_drm.hindex 536cfae..78eb192 100644--- a/pscnv/pscnv_drm.h+++ b/pscnv/pscnv_drm.h@@ -139,6 +139,13 @@ struct drm_pscnv_obj_eng_new { 	uint32_t flags;		/* < */ }; +struct drm_pscnv_clocks {+	uint32_t core;+	uint32_t shader;+	uint32_t core_unknown;+	uint32_t memory;+};+ #define DRM_PSCNV_GETPARAM           0x00	/* get some information from the card */ #define DRM_PSCNV_GEM_NEW            0x20	/* create a new BO */ #define DRM_PSCNV_GEM_INFO           0x21	/* get info about a BO */@@ -153,5 +160,6 @@ struct drm_pscnv_obj_eng_new { #define DRM_PSCNV_FIFO_INIT          0x29	/* Initialises PFIFO processing on a channel */ #define DRM_PSCNV_OBJ_ENG_NEW        0x2a	/* Create a new engine object on a channel */ #define DRM_PSCNV_FIFO_INIT_IB       0x2b	/* Initialises IB PFIFO processing on a channel */+#define DRM_PSCNV_CORE_CLOCK         0x2c	/* Gets the core gpu clock speed */  #endif /* __PSCNV_DRM_H__ */diff --git a/pscnv/pscnv_fifo.h b/pscnv/pscnv_fifo.hindex d91d32a..ec73871 100644--- a/pscnv/pscnv_fifo.h+++ b/pscnv/pscnv_fifo.h@@ -31,5 +31,7 @@ int pscnv_ioctl_fifo_init(struct drm_device *dev, void *data, 						struct drm_file *file_priv); int pscnv_ioctl_fifo_init_ib(struct drm_device *dev, void *data, 						struct drm_file *file_priv);+int pscnv_ioctl_core_clock(struct drm_device *dev, void *data, +						struct drm_file *file_priv);  #endif