rendered paste bodystatic void ohio_hw0_irqdispatch(struct pt_regs *regs) { /* TODO */
struct _irq_hw *IRQ = (struct _irq_hw *)OHIO_IRQ_CTRL_BASE;
unsigned int priority_index_reg = IRQ->priority_index_reg;
unsigned int irq = (priority_index_reg >> 16) & 0x3F;
extern void r4k_wait_end(void);
r4k_wait_end();
irq += MIPS_EXCEPTION_OFFSET;
/*--- printk("[ohio_hw0_irqdispatch] irq=%u chan_nr=%u\n", irq, chan_nr); ---*/
if(irq == MIPS_EXCEPTION_OFFSET) {
unsigned int _irq;
for(_irq = 0 ; _irq < 32 ; _irq++) {
if(IRQ->exception_clear_status_reg & (1 << _irq))
break;
}
if(_irq != 32)
do_IRQ(_irq, regs);
}
#if defined(CONFIG_VLYNQ_SUPPORT)
else if(irq == OHIOINT_VLYNQ0) {
unsigned int vlynq_irq = vlynq_get_irq(0) + OHIO_INT_START_VIRTUAL;
if(vlynq_irq != (unsigned int)-1)
do_IRQ(vlynq_irq, regs);
}
#endif /*--- #if defined(CONFIG_VLYNQ_SUPPORT) ---*/
kstat_this_cpu.irqs[MIPS_EXCEPTION_OFFSET - 2]++;
do_IRQ(irq, regs);
}
/*------------------------------------------------------------------------------------------*\
\*------------------------------------------------------------------------------------------*/
static void ohio_hw1_irqdispatch(struct pt_regs *regs) /* TODO */
{
/*--- do_IRQ(OHIOINT_UART1, regs); ---*/
/*--- struct irq_desc *desc; ---*/
/*--- int cpu = smp_processor_id(); ---*/
struct _irq_hw *IRQ = (struct _irq_hw *)OHIO_IRQ_CTRL_BASE;
unsigned int priority_index_reg = IRQ->priority_index_reg;
unsigned int irq = (priority_index_reg >> 16) & 0x3F;
unsigned int chan_nr = priority_index_reg & 0x3F;
printk("[ohio_hw1_irqdispatch] irq=%u chan_nr=%u\n", irq, chan_nr);
}
static inline int clz(unsigned long x)
{
__asm__ (
" .set push \n"
" .set mips32 \n"
" clz %0, %1 \n"
" .set pop \n"
: "=r" (x)
: "r" (x));
return x;
}