rendered paste bodydiff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfigindex b0995ed..31a9afd 100644--- a/arch/arm/mach-s3c2440/Kconfig+++ b/arch/arm/mach-s3c2440/Kconfig@@ -99,6 +99,9 @@ config MACH_AT2440EVB config MACH_MINI2440 bool "MINI2440 development board" select CPU_S3C2440+ select S3C2440_XTAL_12000000+ select S3C2410_IOTIMING if S3C2440_CPUFREQ+ select S3C24XX_DCLK select S3C_DEV_USB_HOST select EEPROM_AT24 select LEDS_TRIGGER_BACKLIGHTdiff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.cindex 9eb96fb..4f2e304 100644--- a/arch/arm/mach-s3c2440/mach-mini2440.c+++ b/arch/arm/mach-s3c2440/mach-mini2440.c@@ -47,6 +47,7 @@ #include <plat/iic.h> #include <plat/mci.h> #include <plat/udc.h>+#include <plat/cpu-freq.h> /* * This is compiled conditionaly, as:@@ -86,6 +87,21 @@ static struct map_desc mini2440_iodesc[] = { #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE +static struct s3c24xx_uart_clksrc mini2440_serial_clocks[] = {+ [0] = {+ .name = "uclk",+ .divisor = 1,+ .min_baud = 0,+ .max_baud = 0,+ },+ [1] = {+ .name = "pclk",+ .divisor = 1,+ .min_baud = 0,+ .max_baud = 0,+ }+};+ static struct s3c2410_uartcfg mini2440_uartcfgs[] = { [0] = {@@ -94,6 +110,9 @@ static struct s3c2410_uartcfg mini2440_uartcfgs[] = { .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON,+// .clocks = mini2440_serial_clocks,+// .clocks_size = ARRAY_SIZE(mini2440_serial_clocks),+ }, [1] = { .hwport = 1,@@ -101,6 +120,9 @@ static struct s3c2410_uartcfg mini2440_uartcfgs[] = { .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON,+ // .clocks = mini2440_serial_clocks,+ // .clocks_size = ARRAY_SIZE(mini2440_serial_clocks),+ }, [2] = { .hwport = 2,@@ -108,6 +130,9 @@ static struct s3c2410_uartcfg mini2440_uartcfgs[] = { .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON,+// .clocks = mini2440_serial_clocks,+// .clocks_size = ARRAY_SIZE(mini2440_serial_clocks),+ }, }; @@ -336,6 +361,21 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = { S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)), }; +/* CPU Frequency Scaling */+static struct s3c_cpufreq_board __initdata mini2440_cpufreq = {+ .refresh = 15600, /* refresh period is 15.6usec */+ .auto_io = 1,+ .need_io = 1,+};++static struct clk *mini2440_clocks[] __initdata = {+ &s3c24xx_dclk0,+ &s3c24xx_dclk1,+ &s3c24xx_clkout0,+ &s3c24xx_clkout1,+ &s3c24xx_uclk, +};+ /* MMC/SD */ static struct s3c24xx_mci_pdata mini2440_mmc_cfg = {@@ -634,12 +674,28 @@ static struct platform_device *mini2440_devices[] = { static void __init mini2440_map_io(void) {+ /* initialise the clocks */++ s3c24xx_dclk0.parent = &clk_upll;+ s3c24xx_dclk0.rate = 12*1000*1000;++ s3c24xx_dclk1.parent = &clk_upll;+ s3c24xx_dclk1.rate = 24*1000*1000;++ s3c24xx_clkout0.parent = &s3c24xx_dclk0;+ s3c24xx_clkout1.parent = &s3c24xx_dclk1;++ s3c24xx_uclk.parent = &s3c24xx_clkout1;++ s3c24xx_register_clocks(mini2440_clocks, ARRAY_SIZE(mini2440_clocks));+ s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));- s3c24xx_init_clocks(12000000);+ s3c24xx_init_clocks(0); s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs)); s3c_device_nand.dev.platform_data = &mini2440_nand_info; s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg;+ } /*@@ -744,6 +800,7 @@ static void mini2440_parse_features( static void __init mini2440_init(void) {+ struct mini2440_features_t features = { 0 }; int i; @@ -795,6 +852,9 @@ static void __init mini2440_init(void) } s3c24xx_udc_set_platdata(&mini2440_udc_cfg); s3c_i2c0_set_platdata(NULL);++ s3c_cpufreq_setboard(&mini2440_cpufreq);+ i2c_register_board_info(0, mini2440_i2c_devs, ARRAY_SIZE(mini2440_i2c_devs));