All pastes #169247 Raw Edit

cpu

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·published 2006-09-13 19:13 UTC
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[root@test cpuid_bin_lnx]# ./cpuid
number of queries supported: 2
vendor: GenuineIntel
modification: 1
model: 11
family: Pentium Pro
processor type: Original OEM Processor
brand: Intel Pentium III processor
Enhanced Intel SpeedStep Technology: no
Thermal monitor 2: no
L1ContextID support: no
FPU on chip: yes
Virtual 8086 mode enhancements: yes
Debugging extensions: yes
Page size extension: yes
Time step counter: yes
RDMSR and WRMSR instructions: yes
Physical address extension: yes
Machine check exception: yes
CMPXCHG8B instruction: yes
APIC on chip: yes
SYSENTER and SYSEXIT instructions: yes
Memory type range registers: yes
PTE global bit: yes
Machine check architecture: yes
Conditional move instructions: yes
Page attribute table: yes
32-bit page size extension: yes
Processor serial number support: no
CLFLUSH instruction: no
Debug store: no
Thermal monitor and software controlled clock facilities: no
Intel MMX technology: yes
FXSAVE and FXRSTOR instructions: yes
SSE: yes
SSE2: no
Self snoop: no
Hyper-Threading: no
Thermal monitor: no
Pending break enable: no
nof queries for tlb info: 1
--- tlb info ---
Instruction TLB: 4K-Byte Pages, 4-way set associative, 32 entries
Instruction TLB: 4M-Byte Pages, 4-way set associative, 2 entries
Data TLB: 4K-Byte Pages, 4-way set associative, 64 entries
1st-level instruction cache: 16K Bytes, 4-way set associative, 32 byte line size
Data TLB: 4M-Byte Pages, 4-way set associative, 8 entries
1st-level data cache: 16K Bytes, 4-way set associative, 32 byte line size