#
# OpenOCD Daemon Configuration
#
# For information on this configuration refer to
# http://openfacts.berlios.de/index-en.phtml?title=OpenOCD_configuration
#
# Target: Olimex ARM-USB-OCD, Olimex LPC-2378-STK Rev. B
#
# Author: Mitch Ishihara
# $Id$
################################################################################
######################
# OpenOCD Telnet Port
######################
telnet_port 4444
############################
# GDB Port for First Target
############################
gdb_port 3333
################################
# tell gdb our flash memory map
# and enable flash programming
################################
gdb_memory_map enable
gdb_flash_program enable
#######################
# Target Configuration
#######################
# simply attach or reset upon startup
#daemon_startup <'attach'|'reset'>
daemon_startup reset
###############################
# JTAG Interface Configuration
###############################
interface ft2232
# FT2232 Options
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003
#ft2232_latency 10
# 3 apprears to be the fastest possible
# 10 for LPC2378 that is defaulting to the slow 4 MHz internal RC oscillator
# if problems with OpenOCD, increase to 10 or more
# You should try reducing the JTAG frequency by using a higher jtag_speed settings
# (it's a divisor, frequency is 6MHz / (1 + jtag_speed)). The LPC2378 comes up
# running from its internal oscillator at only a few MHz, and the JTAG clock
# has to be less than 1/6th of that.
#jtag_speed <delay>
jtag_speed 50
#Olimex LPC-2378-STK configuration has
# separate trst_and_srst (TRSTN and RSTN)
# trst_open_drain
#reset_config <signals> [combination] [trst_type] [srst_type]
reset_config trst_and_srst srst_pulls_trst
#reset_config trst_and_srst srst_pulls_trst trst_push_pull srst_open_drain
#reset_config trst_and_srst separate trst_push_pull srst_open_drain
#reset_config trst_and_srst separate
#reset_config trst_and_srst
#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough
#jtag_reset 1 1
#jtag_reset 0 0
#jtag_nsrst_delay <ms>
jtag_nsrst_delay 300
#jtag_ntrst_delay <ms>
jtag_ntrst_delay 300
#JTAG Scan Chain
#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
jtag_device 4 0x1 0xf 0xe
#######################
# Target Configuration
#######################
#target <type> <endianess> <reset_mode> <JTAG pos> <variant>
#target arm7tdmi little run_and_init 0
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
#target arm7tdmi little reset_run 0
#target arm7tdmi little reset_init 0
#target arm7tdmi little reset_halt 0
#target_script <target#> <event> <script_file>
#target_script 0 reset ../scripts/openocd_flash_lpc2378.script
#run_and_halt_time <target#> <time_in_ms>
run_and_halt_time 0 30
#working_area <target#> <address> <size> <'backup'|'nobackup'>
working_area 0 0x40000000 0x4000 nobackup
######################
# Flash Configuration
######################
#flash configuration for pre R189
#flash bank lpc2000 <base> <size> 0 0 <variant> <target#> <clock> ['calc_checksum']
#flash bank lpc2000 0x0 0x7F000 0 0 lpc2000_v2 0 12000 calc_checksum
#flash configuration for R189 and later
# size is 0x7E000 since 0x7F000-0x7FFFF is boot block
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> ['calc_checksum']
flash bank lpc2000 0x0 0x80000 0 0 0 lpc2000_v2 12000 calc_checksum
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger