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Index: pcsx2/Memory.cpp===================================================================--- pcsx2/Memory.cpp	(revision 1037)+++ pcsx2/Memory.cpp	(working copy)@@ -820,6 +820,7 @@  	u32 offset=((u8*)ptr-psM); 	offset>>=12;+	psMPWC[(offset/32)] &= ~(1<<(offset&31));  	for (u32 i=0;i<psMPWVA[offset].size();i++) 	{Index: pcsx2/x86/ix86-32/iR5900-32.cpp===================================================================--- pcsx2/x86/ix86-32/iR5900-32.cpp	(revision 1037)+++ pcsx2/x86/ix86-32/iR5900-32.cpp	(working copy)@@ -48,6 +48,8 @@  #include "NakedAsm.h" +using namespace x86Emitter;+ using namespace R5900;  // used to disable register freezing during cpuBranchTests (registers@@ -92,6 +94,7 @@ static BASEBLOCKEX* s_pCurBlockEx = NULL; static u32 s_nEndBlock = 0; // what pc the current block ends	 static u32 s_nHasDelay = 0;+static bool speedHackBlock;  // save states for branches GPR_reg64 s_saveConstRegs[32];@@ -1147,19 +1150,23 @@ 	// Equiv code to: 	//    cpuRegs.cycle += blockcycles; 	//    if( cpuRegs.cycle > g_nextBranchCycle ) { DoEvents(); }-	MOV32MtoR(EAX, (uptr)&cpuRegs.cycle);-	ADD32ItoR(EAX, eeScaleBlockCycles());-	MOV32RtoM((uptr)&cpuRegs.cycle, EAX); // update cycles-	SUB32MtoR(EAX, (uptr)&g_nextBranchCycle);--	if (!noDispatch) {-		if (newpc == 0xffffffff)-			JS32((uptr)DispatcherReg - ( (uptr)x86Ptr + 6 ));-		else-			iBranch(newpc, 1);+	if (speedHackBlock) {+		xMOV(eax, ptr32[&g_nextBranchCycle]);+		xMOV(ptr32[&cpuRegs.cycle], eax);+		RET();+	} else {+		MOV32MtoR(EAX, (uptr)&cpuRegs.cycle);+		ADD32ItoR(EAX, eeScaleBlockCycles());+		MOV32RtoM((uptr)&cpuRegs.cycle, EAX); // update cycles+		SUB32MtoR(EAX, (uptr)&g_nextBranchCycle);+		if (!noDispatch) {+			if (newpc == 0xffffffff)+				JS32((uptr)DispatcherReg - ( (uptr)x86Ptr + 6 ));+			else+				iBranch(newpc, 1);+		}+		RET(); 	}--	RET(); }  static void checkcodefn()@@ -1355,6 +1362,13 @@ 	Cpu->Clear(start,sz); } +void __fastcall dyna_block_reset(u32 start,u32 sz)+{+	DevCon::WriteLn("dyna_block_reset %08X , count %d", params start,sz);+	Cpu->Clear(start & ~0xfffUL, 0x400);+	mmap_MarkCountedRamPage(PSM(start), start & ~0xfffUL);+}+ void recRecompile( const u32 startpc ) { 	u32 i = 0;@@ -1384,6 +1398,10 @@ 	x86Align(16); 	recPtr = x86Ptr; +	speedHackBlock = false;+	if (HWADDR(startpc) == 0x81fc0)+		speedHackBlock = true;+ 	s_pCurBlock = PC_GETBLOCK(startpc);  	assert(s_pCurBlock->GetFnptr() == (uptr)JITCompile@@ -1695,9 +1713,10 @@ 		iDumpBlock(startpc, recPtr); #endif +	static u16 manual_page[Ps2MemSize::Base >> 12]; 	u32 sz=(s_nEndBlock-startpc)>>2; -	u32 inpage_ptr=startpc;+	u32 inpage_ptr=HWADDR(startpc); 	u32 inpage_sz=sz*4;  	while(inpage_sz)@@ -1708,12 +1727,14 @@  		if(PageType!=-1) 		{-			if (PageType==0)+			if (PageType==0) { 				mmap_MarkCountedRamPage(PSM(inpage_ptr),inpage_ptr&~0xFFF);+				manual_page[inpage_ptr >> 12] = 0;+			} 			else 			{-				MOV32ItoR(ECX, startpc);-				MOV32ItoR(EDX, sz);+				MOV32ItoR(ECX, inpage_ptr);+				MOV32ItoR(EDX, pgsz);  				u32 lpc=inpage_ptr; 				u32 stg=pgsz;@@ -1726,6 +1747,11 @@ 					stg-=4; 					lpc+=4; 				}+				if (startpc != 0x81fc0) {+					xADD(ptr16[&manual_page[inpage_ptr >> 12]], 1);+					iJccKnownTarget(Jcc_Carry, dyna_block_reset);+				}+ 				DbgCon::WriteLn("Manual block @ %08X : %08X %d %d %d %d", params 					startpc,inpage_ptr,pgsz,0x1000-inpage_offs,inpage_sz,sz*4); 			}