rendered paste bodySigned-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Index: src/northbridge/intel/i82810/raminit.c
===================================================================
--- src/northbridge/intel/i82810/raminit.c (Revision 3761)
+++ src/northbridge/intel/i82810/raminit.c (Arbeitskopie)
@@ -70,6 +70,7 @@
uint32_t addr_offset, uint32_t row_offset)
{
uint8_t reg;
+ uint32_t tmp;
/* TODO: Support for multiple DIMMs. */
@@ -91,7 +92,15 @@
/* Read from (DIMM start address + addr_offset). */
read32(0 + addr_offset); //first offset is always 0
- read32(row_offset + addr_offset);
+
+
+ tmp = row_offset + addr_offset;
+
+ /* For the second DIMM we have to invert SMAA[7:4]. */
+ if (command == RAM_COMMAND_MRS)
+ tmp = row_offset + 0x650;
+
+ read32(tmp);
}
/*-----------------------------------------------------------------------------
@@ -241,7 +250,7 @@
*/
static void set_dram_buffer_strength(const struct mem_controller *ctrl)
{
- pci_write_config16(ctrl->d0, BUFF_SC, 0x77da);
+ pci_write_config16(ctrl->d0, BUFF_SC, 0x8655);
}
/*-----------------------------------------------------------------------------
@@ -325,7 +334,7 @@
* single sided DIMMs. Needs to work with 2 dual sided DIMMs in the
* long run.
*/
- uint32_t row_offset;
+ uint32_t row_offset = 128 * 1024 * 1024;
spd_set_dram_size(ctrl, row_offset);