Part of Slepp's ProjectsPastebinTURLImagebinFilebin
Feedback -- English French German Japanese
Create Upload Newest Tools Donate
Sign In | Create Account

mc13783.c
Wednesday, November 7th, 2007 at 5:32:36pm UTC 

  1. /*
  2. * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
  3. */
  4.  
  5. /*
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13.  
  14. /*!
  15. * @file pmic/core/mc13783.c
  16. * @brief This file contains MC13783 specific PMIC code. This implementaion
  17. * may differ for each PMIC chip.
  18. *
  19. * @ingroup PMIC_CORE
  20. */
  21.  
  22. /*
  23. * Includes
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <linux/device.h>
  30. #include <linux/spi/spi.h>
  31.  
  32. #include <asm/uaccess.h>
  33. #include <asm/arch/gpio.h>
  34.  
  35. #include <asm/arch/pmic_external.h>
  36. #include <asm/arch/pmic_status.h>
  37. #include "pmic_config.h"
  38. #include "pmic.h"
  39.  
  40. /*
  41. * Defines
  42. */
  43. #define EVENT_MASK_0            0x697fdf
  44. #define EVENT_MASK_1            0x3efffb
  45. #define MXC_PMIC_FRAME_MASK          0x00FFFFFF
  46. #define MXC_PMIC_MAX_REG_NUM        0x3F
  47. #define MXC_PMIC_REG_NUM_SHIFT    0x19
  48. #define MXC_PMIC_WRITE_BIT_SHIFT        31
  49.  
  50. static unsigned int events_enabled0 = 0;
  51. static unsigned int events_enabled1 = 0;
  52. static struct mxc_pmic pmic_drv_data;
  53.  
  54. /*!
  55. * This function is called to read a register on PMIC.
  56. *
  57. * @param        reg_num     number of the pmic register to be read
  58. * @param        reg_val   return value of register
  59. *
  60. * @return       Returns 0 on success -1 on failure.
  61. */
  62. int pmic_read(unsigned int reg_num, unsigned int *reg_val)
  63. {
  64.         unsigned int frame = 0;
  65.         int ret = 0;
  66.  
  67.         if (reg_num > MXC_PMIC_MAX_REG_NUM)
  68.                 return PMIC_ERROR;
  69.  
  70.         frame |= reg_num << MXC_PMIC_REG_NUM_SHIFT;
  71.  
  72.         ret = spi_rw(pmic_drv_data.spi, (u8 *) & frame, 1);
  73.  
  74.         *reg_val = frame & MXC_PMIC_FRAME_MASK;
  75.  
  76.         return ret;
  77. }
  78.  
  79. /*!
  80. * This function is called to write a value to the register on PMIC.
  81. *
  82. * @param        reg_num     number of the pmic register to be written
  83. * @param        reg_val   value to be written
  84. *
  85. * @return       Returns 0 on success -1 on failure.
  86. */
  87. int pmic_write(int reg_num, const unsigned int reg_val)
  88. {
  89.         unsigned int frame = 0;
  90.         int ret = 0;
  91.  
  92.         if (reg_num > MXC_PMIC_MAX_REG_NUM)
  93.                 return PMIC_ERROR;
  94.  
  95.         frame |= (1 << MXC_PMIC_WRITE_BIT_SHIFT);
  96.  
  97.         frame |= reg_num << MXC_PMIC_REG_NUM_SHIFT;
  98.  
  99.         frame |= reg_val & MXC_PMIC_FRAME_MASK;
  100.  
  101.         ret = spi_rw(pmic_drv_data.spi, (u8 *) & frame, 1);
  102.  
  103.         return ret;
  104. }
  105.  
  106. /*!
  107. * This function initializes the SPI device parameters for this PMIC.
  108. *
  109. * @param    spi        the SPI slave device(PMIC)
  110. *
  111. * @return   None
  112. */
  113. int pmic_spi_setup(struct spi_device *spi)
  114. {
  115.         /* Setup the SPI slave i.e.PMIC */
  116.         pmic_drv_data.spi = spi;
  117.  
  118.         spi->mode = SPI_MODE_2 | SPI_CS_HIGH;
  119.         spi->bits_per_word = 32;
  120.  
  121.         return spi_setup(spi);
  122. }
  123.  
  124. /*!
  125. * This function initializes the PMIC registers.
  126. *
  127. * @return   None
  128. */
  129. int pmic_init_registers(void)
  130. {
  131.         CHECK_ERROR(pmic_write(REG_INTERRUPT_MASK_0, MXC_PMIC_FRAME_MASK));
  132.         CHECK_ERROR(pmic_write(REG_INTERRUPT_MASK_1, MXC_PMIC_FRAME_MASK));
  133.         CHECK_ERROR(pmic_write(REG_INTERRUPT_STATUS_0, MXC_PMIC_FRAME_MASK));
  134.         CHECK_ERROR(pmic_write(REG_INTERRUPT_STATUS_1, MXC_PMIC_FRAME_MASK));
  135.         return PMIC_SUCCESS;
  136. }
  137.  
  138. /*!
  139. * This function returns the PMIC version in system.
  140. *
  141. * @param       ver   pointer to the pmic_version_t structure
  142. *
  143. * @return       This function returns PMIC version.
  144. */
  145. void pmic_get_revision(pmic_version_t * ver)
  146. {
  147.         int rev_id = 0;
  148.         int rev1 = 0;
  149.         int rev2 = 0;
  150.         int finid = 0;
  151.         int icid = 0;
  152.  
  153.         ver->id = PMIC_MC13783;
  154.         pmic_read(REG_REVISION, &rev_id);
  155.  
  156.         rev1 = (rev_id & 0x018) >> 3;
  157.         rev2 = (rev_id & 0x007);
  158.         icid = (rev_id & 0x01C0) >> 6;
  159.         finid = (rev_id & 0x01E00) >> 9;
  160.  
  161.         /* Ver 0.2 is actually 3.2a.  Report as 3.2 */
  162.         if ((rev1 == 0) && (rev2 == 2)) {
  163.                 rev1 = 3;
  164.         }
  165.  
  166.         if (rev1 == 0 || icid != 2) {
  167.                 ver->revision = -1;
  168.                 printk(KERN_NOTICE
  169.                        "mc13783: Not detected.\tAccess failed\t!!!\n");
  170.                 return;
  171.         } else {
  172.                 ver->revision = ((rev1 * 10) + rev2);
  173.                 printk(KERN_INFO "mc13783 Rev %d.%d FinVer %x detected\n", rev1,
  174.                        rev2, finid);
  175.         }
  176.  
  177.         return;
  178.  
  179. }
  180.  
  181. /*!
  182. * This function reads the interrupt status registers of PMIC
  183. * and determine the current active events.
  184. *
  185. * @param       active_events array pointer to be used to return active
  186. *            event numbers.
  187. *
  188. * @return       This function returns PMIC version.
  189. */
  190. unsigned int pmic_get_active_events(unsigned int *active_events)
  191. {
  192.         unsigned int count = 0;
  193.         unsigned int status0, status1;
  194.         int bit_set;
  195.  
  196.         pmic_read(REG_INTERRUPT_STATUS_0, &status0);
  197.         pmic_read(REG_INTERRUPT_STATUS_1, &status1);
  198.         pmic_write(REG_INTERRUPT_STATUS_0, status0);
  199.         pmic_write(REG_INTERRUPT_STATUS_1, status1);
  200.         status0 &= events_enabled0;
  201.         status1 &= events_enabled1;
  202.  
  203.         while (status0) {
  204.                 bit_set = ffs(status0) - 1;
  205.                 *(active_events + count) = bit_set;
  206.                 count++;
  207.                 status0 ^= (1 << bit_set);
  208.         }
  209.         while (status1) {
  210.                 bit_set = ffs(status1) - 1;
  211.                 *(active_events + count) = bit_set + 24;
  212.                 count++;
  213.                 status1 ^= (1 << bit_set);
  214.         }
  215.  
  216.         return count;
  217. }
  218.  
  219. /*!
  220. * This function unsets a bit in mask register of pmic to unmask an event IT.
  221. *
  222. * @param       event  the event to be unmasked
  223. *
  224. * @return    This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE.
  225. */
  226. int pmic_event_unmask(type_event event)
  227. {
  228.         unsigned int event_mask = 0;
  229.         unsigned int mask_reg = 0;
  230.         unsigned int event_bit = 0;
  231.         int ret;
  232.  
  233.         if (event < EVENT_E1HZI) {
  234.                 mask_reg = REG_INTERRUPT_MASK_0;
  235.                 event_mask = EVENT_MASK_0;
  236.                 event_bit = (1 << event);
  237.                 events_enabled0 |= event_bit;
  238.         } else {
  239.                 event -= 24;
  240.                 mask_reg = REG_INTERRUPT_MASK_1;
  241.                 event_mask = EVENT_MASK_1;
  242.                 event_bit = (1 << event);
  243.                 events_enabled1 |= event_bit;
  244.         }
  245.  
  246.         if ((event_bit & event_mask) == 0) {
  247.                 pr_debug("Error: unmasking a reserved/unused event\n");
  248.                 return PMIC_ERROR;
  249.         }
  250.  
  251.         ret = pmic_write_reg(mask_reg, 0, event_bit);
  252.  
  253.         pr_debug("Enable Event : %d\n", event);
  254.  
  255.         return ret;
  256. }
  257.  
  258. /*!
  259. * This function sets a bit in mask register of pmic to disable an event IT.
  260. *
  261. * @param       event  the event to be masked
  262. *
  263. * @return     This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE.
  264. */
  265. int pmic_event_mask(type_event event)
  266. {
  267.         unsigned int event_mask = 0;
  268.         unsigned int mask_reg = 0;
  269.         unsigned int event_bit = 0;
  270.         int ret;
  271.  
  272.         if (event < EVENT_E1HZI) {
  273.                 mask_reg = REG_INTERRUPT_MASK_0;
  274.                 event_mask = EVENT_MASK_0;
  275.                 event_bit = (1 << event);
  276.                 events_enabled0 &= ~event_bit;
  277.         } else {
  278.                 event -= 24;
  279.                 mask_reg = REG_INTERRUPT_MASK_1;
  280.                 event_mask = EVENT_MASK_1;
  281.                 event_bit = (1 << event);
  282.                 events_enabled1 &= ~event_bit;
  283.         }
  284.  
  285.         if ((event_bit & event_mask) == 0) {
  286.                 pr_debug("Error: masking a reserved/unused event\n");
  287.                 return PMIC_ERROR;
  288.         }
  289.  
  290.         ret = pmic_write_reg(mask_reg, event_bit, event_bit);
  291.  
  292.         pr_debug("Disable Event : %d\n", event);
  293.  
  294.         return ret;
  295. }
  296.  
  297. /*!
  298. * This function is called to read all sensor bits of PMIC.
  299. *
  300. * @param        sensor    Sensor to be checked.
  301. *
  302. * @return       This function returns true if the sensor bit is high;
  303. *               or returns false if the sensor bit is low.
  304. */
  305. bool pmic_check_sensor(t_sensor sensor)
  306. {
  307.         return false;
  308. }
  309.  
  310. /*!
  311. * This function checks one sensor of PMIC.
  312. *
  313. * @param        sensor_bits  structure of all sensor bits.
  314. *
  315. * @return    This function returns PMIC_SUCCESS on SUCCESS, error on FAILURE.
  316. */
  317.  
  318. PMIC_STATUS pmic_get_sensors(t_sensor_bits * sensor_bits)
  319. {
  320.         int sense_0 = 0;
  321.         int sense_1 = 0;
  322.  
  323.         memset(sensor_bits, 0, sizeof(t_sensor_bits));
  324.  
  325.         pmic_read_reg(REG_INTERRUPT_SENSE_0, &sense_0, 0xffffff);
  326.         pmic_read_reg(REG_INTERRUPT_SENSE_1, &sense_1, 0xffffff);
  327.  
  328.         sensor_bits->sense_chgdets = (sense_0 & (1 << 6)) ? true : false;
  329.         sensor_bits->sense_chgovs = (sense_0 & (1 << 7)) ? true : false;
  330.         sensor_bits->sense_chgrevs = (sense_0 & (1 << 8)) ? true : false;
  331.         sensor_bits->sense_chgshorts = (sense_0 & (1 << 9)) ? true : false;
  332.         sensor_bits->sense_cccvs = (sense_0 & (1 << 10)) ? true : false;
  333.         sensor_bits->sense_chgcurrs = (sense_0 & (1 << 11)) ? true : false;
  334.         sensor_bits->sense_bpons = (sense_0 & (1 << 12)) ? true : false;
  335.         sensor_bits->sense_lobatls = (sense_0 & (1 << 13)) ? true : false;
  336.         sensor_bits->sense_lobaths = (sense_0 & (1 << 14)) ? true : false;
  337.         sensor_bits->sense_usb4v4s = (sense_0 & (1 << 16)) ? true : false;
  338.         sensor_bits->sense_usb2v0s = (sense_0 & (1 << 17)) ? true : false;
  339.         sensor_bits->sense_usb0v8s = (sense_0 & (1 << 18)) ? true : false;
  340.         sensor_bits->sense_id_floats = (sense_0 & (1 << 19)) ? true : false;
  341.         sensor_bits->sense_id_gnds = (sense_0 & (1 << 20)) ? true : false;
  342.         sensor_bits->sense_se1s = (sense_0 & (1 << 21)) ? true : false;
  343.         sensor_bits->sense_ckdets = (sense_0 & (1 << 22)) ? true : false;
  344.  
  345.         sensor_bits->sense_onofd1s = (sense_1 & (1 << 3)) ? true : false;
  346.         sensor_bits->sense_onofd2s = (sense_1 & (1 << 4)) ? true : false;
  347.         sensor_bits->sense_onofd3s = (sense_1 & (1 << 5)) ? true : false;
  348.         sensor_bits->sense_pwrrdys = (sense_1 & (1 << 11)) ? true : false;
  349.         sensor_bits->sense_thwarnhs = (sense_1 & (1 << 12)) ? true : false;
  350.         sensor_bits->sense_thwarnls = (sense_1 & (1 << 13)) ? true : false;
  351.         sensor_bits->sense_clks = (sense_1 & (1 << 14)) ? true : false;
  352.         sensor_bits->sense_mc2bs = (sense_1 & (1 << 17)) ? true : false;
  353.         sensor_bits->sense_hsdets = (sense_1 & (1 << 18)) ? true : false;
  354.         sensor_bits->sense_hsls = (sense_1 & (1 << 19)) ? true : false;
  355.         sensor_bits->sense_alspths = (sense_1 & (1 << 20)) ? true : false;
  356.         sensor_bits->sense_ahsshorts = (sense_1 & (1 << 21)) ? true : false;
  357.         return PMIC_SUCCESS;
  358. }
  359.  
  360. EXPORT_SYMBOL(pmic_check_sensor);
  361. EXPORT_SYMBOL(pmic_get_sensors);

Update the Post

Either update this post and resubmit it with changes, or make a new post.

You may also comment on this post.

update paste below
details of the post (optional)

Note: Only the paste content is required, though the following information can be useful to others.

Save name / title?

(space separated, optional)



Please note that information posted here will expire by default in one month. If you do not want it to expire, please set the expiry time above. If it is set to expire, web search engines will not be allowed to index it prior to it expiring. Items that are not marked to expire will be indexable by search engines. Be careful with your passwords. All illegal activities will be reported and any information will be handed over to the authorities, so be good.

comments powered by Disqus
worth-right