Level 4 user:
Writes new modules
input:
none
output:
module spec file
tools used:
text editor
Level 3 user:
Makes new arrangements of existing modules
input:
module spec files (a specific directory?)
output:
a configuration file which contains information on all modules used
tools used:
a configuration editor. This will be a text editor for now, but could be a nice GUI later.
FPGA file preprocessor (invoked from make), which takes in VHDL files and the configuration file, and makes VHDL source connections to support the configuration
make, which will generate the bitfile and .fpga file
FPGA file preprocessr (invoked from make), which will put the default RAM data into a "w" block in the FPGA file, and will put configurable options into an "o" block
Level 2 user:
Chooses settings for an existing configuration
input:
an FPGA file with suitable extra blocks of data ("w" and "o" above)
output:
an FPGA file with modified "1K RAM" config data
tools used:
A nice-looking GUI that allows the user to select between different options for the modules that exist in the FPGA. For example, choosing to enable a stepgen or not.