rendered paste bodyIndex: firmware/export/pp5020.h
===================================================================
RCS file: /cvsroot/rockbox/firmware/export/pp5020.h,v
retrieving revision 1.11
diff -u -r1.11 pp5020.h
--- firmware/export/pp5020.h 20 Dec 2006 15:28:31 -0000 1.11
+++ firmware/export/pp5020.h 26 Dec 2006 16:11:08 -0000
@@ -132,6 +132,18 @@
#define INIT_USB 0x80000000
+#define CLK_SRC (*(volatile unsigned long *)(0x60006020))
+#define CLK_SRC_32KHZ 0
+#define CLK_SRC_16MHZ 1
+#define CLK_SRC_24MHZ 2
+#define CLK_SRC_33MHZ 3
+#define CLK_SRC_48MHZ 4
+#define CLK_SRC_SLOW 5 /* 24MHz with additional divider */
+#define CLK_SRC_FAST 6 /* PLL with additional divider */
+#define CLK_SRC_PLL 7
+
+#define PLL_CONTROL (*(volatile unsigned long *)(0x60006034))
+
#define TIMER1_CFG (*(volatile unsigned long *)(0x60005000))
#define TIMER1_VAL (*(volatile unsigned long *)(0x60005004))
#define TIMER2_CFG (*(volatile unsigned long *)(0x60005008))
@@ -144,6 +156,12 @@
#define CPU_HI_INT_EN (*(volatile unsigned long*)(0x60004124))
#define CPU_INT_CLR (*(volatile unsigned long*)(0x60004028))
#define CPU_HI_INT_CLR (*(volatile unsigned long*)(0x60004128))
+#define COP_INT_STAT (*(volatile unsigned long*)(0x60004004)) /* Guessed */
+#define COP_HI_INT_STAT (*(volatile unsigned long*)(0x60004104)) /* From IPL*/
+#define COP_INT_EN (*(volatile unsigned long*)(0x60004034)) /* Guessed */
+#define COP_HI_INT_EN (*(volatile unsigned long*)(0x60004134)) /* From IPL*/
+#define COP_INT_CLR (*(volatile unsigned long*)(0x60004038)) /* Guessed */
+#define COP_HI_INT_CLR (*(volatile unsigned long*)(0x60004138)) /* From IPL*/
#define TIMER1_IRQ 0
#define TIMER2_IRQ 1
@@ -163,6 +181,9 @@
#define SER1_MASK (1 << (SER1_IRQ-32))
#define I2C_MASK (1 << (I2C_IRQ-32))
+/* Bit 30 is PLL enable */
+#define DEVICE_CONTROL (*(volatile unsigned long*)(0x70000020))
+
#define IISCONFIG (*(volatile unsigned long*)(0x70002800))
#define IISFIFO_CFG (*(volatile unsigned long*)(0x7000280c))