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Monday, December 11th, 2006 at 1:11:55am UTC 

  1. --- firmware/target/arm/crt0-pp-old.S   2006-12-11 00:45:43.000000000 +0000
  2. +++ firmware/target/arm/crt0-pp.S       2006-12-11 01:07:38.000000000 +0000
  3. @@ -5,7 +5,7 @@
  4.   *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
  5.   *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
  6.   *                     \/            \/     \/    \/            \/
  7. - * $Id: crt0-pp.S,v 1.2 2006-11-22 00:49:16 dan_a Exp $
  8. + * $Id: crt0-pp.S,v 1.2 2006/11/22 00:49:16 dan_a Exp $
  9.   *
  10.   * Copyright (C) 2002 by Linus Nielsen Feltzing
  11.   *
  12. @@ -102,11 +102,13 @@
  13.  
  14.      /* After doing the remapping, send the COP to sleep.
  15.         On wakeup it will go to cop_init */
  16. +
  17. +    /* Find out which processor we are */
  18.      ldr    r0, =PROC_ID
  19.      ldr    r0, [r0]
  20.      and    r0, r0, #0xff
  21.      cmp    r0, #0x55
  22. -    beq    1f
  23. +    beq    cpu_init
  24.      
  25.      /* put us (co-processor) to sleep */
  26.      ldr    r4, =COP_CTRL
  27. @@ -115,9 +117,15 @@
  28.  
  29.      ldr    pc, =cop_init
  30.  
  31. -1:
  32.  
  33. -#ifndef DEBUG
  34. +cpu_init:
  35. +    /* Wait for COP to be sleeping */
  36. +    ldr    r4, =COP_STATUS
  37. +1:
  38. +    ldr    r3, [r4]
  39. +    ands   r3, r3, #SLEEPING
  40. +    beq    1b
  41. +   
  42.      /* Copy exception handler code to address 0 */
  43.      ldr    r2, =_vectorsstart
  44.      ldr    r3, =_vectorsend
  45. @@ -127,15 +135,7 @@
  46.      ldrhi  r5, [r4], #4
  47.      strhi  r5, [r2], #4
  48.      bhi    1b
  49. -#else
  50. -    ldr    r1, =vectors
  51. -    ldr    r0, =irq_handler
  52. -    str    r0, [r1, #24]
  53. -    ldr    r0, =fiq_handler
  54. -    str    r0, [r1, #28]
  55. -#endif
  56.  
  57. -#ifndef STUB
  58.      /* Zero out IBSS */
  59.      ldr    r2, =_iedata
  60.      ldr    r3, =_iend
  61. @@ -154,7 +154,6 @@
  62.      ldrhi  r5, [r2], #4
  63.      strhi  r5, [r3], #4
  64.      bhi    1b
  65. -#endif /* !STUB */
  66.  
  67.      /* Initialise bss section to zero */
  68.      ldr    r2, =_edata
  69. @@ -199,6 +198,19 @@
  70.      /* main() should never return */
  71.  
  72.  cop_init:
  73. +    /* COP: Invalidate cache */
  74. +    ldr    r0, =0xf000f044
  75. +    ldr    r1, [r0]
  76. +    orr    r1, r1, #0x6
  77. +    str    r1, [r0]
  78. +
  79. +    ldr    r0, =0x6000c000
  80. +1:
  81. +    ldr    r1, [r0]
  82. +    tst    r1, #0x8000
  83. +    bne    1b
  84. +
  85. +    /* Setup stack for COP */
  86.      ldr    sp, =cop_stackend
  87.      mov    r3, sp
  88.      ldr    r2, =cop_stackbegin
  89. @@ -209,6 +221,8 @@
  90.      bhi    2b
  91.  
  92.      ldr    sp, =cop_stackend
  93. +   
  94. +    /* Run cop_main() in apps/main.c */
  95.      bl     cop_main
  96.      
  97.  /* Exception handlers. Will be copied to address 0 after memory remapping */

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