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Sunday, December 10th, 2006 at 5:05:02pm UTC 

  1. ? e200-dualboot.patch
  2. ? h10_boot
  3. ? ipod_boot
  4. ? firmware/target/arm/crt0-pp-normal.S
  5. ? tools/codepages
  6. ? tools/ipod_fw
  7. ? tools/rdf2binary
  8. Index: bootloader/e200.c
  9. ===================================================================
  10. RCS file: /cvsroot/rockbox/bootloader/e200.c,v
  11. retrieving revision 1.5
  12. diff -u -r1.5 e200.c
  13. --- bootloader/e200.c   16 Oct 2006 17:21:30 -0000 1.5
  14. +++ bootloader/e200.c   10 Dec 2006 17:04:11 -0000
  15. @@ -5,9 +5,12 @@
  16.   *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
  17.   *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
  18.   *                     \/            \/     \/    \/            \/
  19. - * $Id: e200.c,v 1.5 2006-10-16 17:21:30 dan_a Exp $
  20. + * $Id: h10.c,v 1.4 2006-08-28 08:11:32 barrywardell Exp $
  21.   *
  22. - * Copyright (C) 2006 Daniel Stenberg
  23. + * Copyright (C) 2006 by Barry Wardell
  24. + *
  25. + * Based on Rockbox iriver bootloader by Linus Nielsen Feltzing
  26. + * and the ipodlinux bootloader by Daniel Palffy and Bernard Leach
  27.   *
  28.   * All files in this archive are subject to the GNU General Public License.
  29.   * See the file COPYING in the source tree root for full license agreement.
  30. @@ -32,63 +35,202 @@
  31.  #include "font.h"
  32.  #include "adc.h"
  33.  #include "backlight.h"
  34. +#include "button.h"
  35.  #include "panic.h"
  36.  #include "power.h"
  37.  #include "file.h"
  38.  
  39. -static inline void blink(void)
  40. +/* Size of the buffer to store the loaded Rockbox/Sansa image */
  41. +#define MAX_LOADSIZE (10*1024*1024)
  42. +
  43. +/* A buffer to load the iriver firmware or Rockbox into */
  44. +unsigned char loadbuffer[MAX_LOADSIZE];
  45. +
  46. +char version[] = APPSVERSION;
  47. +
  48. +#define DRAM_START              0x10000000
  49. +
  50. +int line=0;
  51. +
  52. +/* Load original Sandisk firmware. This function expects a file called
  53. +   "/.rockbox/OF.bin" on the player. It should be decrypted
  54. +   and have the header stripped using mi4code. It reads the file in to a memory
  55. +   buffer called buf. The rest of the loading is done in main() and crt0.S
  56. +*/
  57. +int load_sandisk(unsigned char* buf)
  58.  {
  59. -    volatile unsigned int* ptr;
  60. +    int fd;
  61. +    int rc;
  62. +    int len;
  63. +
  64. +    fd = open("/.rockbox/OF.bin", O_RDONLY);
  65. +
  66. +    len = filesize(fd);
  67. +
  68. +    if (len > MAX_LOADSIZE)
  69. +        return -6;
  70. +
  71. +    rc = read(fd, buf, len);
  72. +    if(rc < len)
  73. +        return -4;
  74. +
  75. +    close(fd);
  76. +    return len;
  77. +}
  78. +
  79. +/* Load Rockbox firmware (rockbox.e200) */
  80. +int load_rockbox(unsigned char* buf)
  81. +{
  82. +    int fd;
  83. +    int rc;
  84. +    int len;
  85. +    unsigned long chksum;
  86. +    char model[5];
  87. +    unsigned long sum;
  88.      int i;
  89. -    ptr = (volatile unsigned int*)0x70000020;
  90. +    char str[80];
  91.  
  92. -    *ptr &= ~(1 << 13);
  93. -    for(i = 0; i < 0xfffff; i++)
  94. +    fd = open("/.rockbox/" BOOTFILE, O_RDONLY);
  95. +    if(fd < 0)
  96.      {
  97. +        fd = open("/" BOOTFILE, O_RDONLY);
  98. +        if(fd < 0)
  99. +            return -1;
  100.      }
  101. -    *ptr |= (1 << 13);
  102. -    for(i = 0; i < 0xfffff; i++)
  103. -    {
  104. +
  105. +    len = filesize(fd) - 8;
  106. +
  107. +    snprintf(str, sizeof(str), "Length: %x", len);
  108. +    lcd_puts(0, line++ ,str);
  109. +    lcd_update();
  110. +
  111. +    if (len > MAX_LOADSIZE)
  112. +        return -6;
  113. +
  114. +    lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
  115. +
  116. +    rc = read(fd, &chksum, 4);
  117. +    chksum=betoh32(chksum); /* Rockbox checksums are big-endian */
  118. +    if(rc < 4)
  119. +        return -2;
  120. +
  121. +    snprintf(str, sizeof(str), "Checksum: %x", chksum);
  122. +    lcd_puts(0, line++ ,str);
  123. +    lcd_update();
  124. +
  125. +    rc = read(fd, model, 4);
  126. +    if(rc < 4)
  127. +        return -3;
  128. +
  129. +    model[4] = 0;
  130. +
  131. +    snprintf(str, sizeof(str), "Model name: %s", model);
  132. +    lcd_puts(0, line++ ,str);
  133. +    lcd_update();
  134. +
  135. +    lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
  136. +
  137. +    rc = read(fd, buf, len);
  138. +    if(rc < len)
  139. +        return -4;
  140. +
  141. +    close(fd);
  142. +
  143. +    sum = MODEL_NUMBER;
  144. +
  145. +    for(i = 0;i < len;i++) {
  146. +        sum += buf[i];
  147.      }
  148. +
  149. +    snprintf(str, sizeof(str), "Sum: %x", sum);
  150. +    lcd_puts(0, line++ ,str);
  151. +    lcd_update();
  152. +
  153. +    if(sum != chksum)
  154. +        return -5;
  155. +
  156. +    return len;
  157.  }
  158.  
  159. -static inline void slow_blink(void)
  160. +void* main(void)
  161.  {
  162. -    volatile unsigned int* ptr;
  163. +    char buf[256];
  164.      int i;
  165. -    ptr = (volatile unsigned int*)0x70000020;
  166. +    int rc;
  167. +    unsigned short* identify_info;
  168. +    struct partinfo* pinfo;
  169.  
  170. -    *ptr &= ~(1 << 13);
  171. -    for(i = 0; i < (0xfffff); i++)
  172. -    {
  173. -    }
  174. -    for(i = 0; i < (0xfffff); i++)
  175. -    {
  176. -    }
  177. -    for(i = 0; i < (0xfffff); i++)
  178. -    {
  179. -    }
  180. +    system_init();
  181. +    kernel_init();
  182. +    lcd_init();
  183. +    font_init();
  184.  
  185. -    *ptr |= (1 << 13);
  186. -    for(i = 0; i < (0xfffff); i++)
  187. +    line=0;
  188. +
  189. +    lcd_setfont(FONT_SYSFIXED);
  190. +
  191. +    lcd_puts(0, line++, "Rockbox boot loader");
  192. +    snprintf(buf, sizeof(buf), "Version: 20%s", version);
  193. +    lcd_puts(0, line++, buf);
  194. +    snprintf(buf, sizeof(buf), "Sandisk Sansa E200");
  195. +    lcd_puts(0, line++, buf);
  196. +    lcd_update();
  197. +
  198. +    i=ata_init();
  199. +    if (i==0) {
  200. +      identify_info=ata_get_identify();
  201. +      /* Show model */
  202. +      for (i=0; i < 20; i++) {
  203. +        ((unsigned short*)buf)[i]=htobe16(identify_info[i+27]);
  204. +      }
  205. +      buf[40]=0;
  206. +      for (i=39; i && buf[i]==' '; i--) {
  207. +        buf[i]=0;
  208. +      }
  209. +      lcd_puts(0, line++, buf);
  210. +      lcd_update();
  211. +    } else {
  212. +      snprintf(buf, sizeof(buf), "ATA: %d", i);
  213. +      lcd_puts(0, line++, buf);
  214. +      lcd_update();
  215. +    }
  216. +
  217. +    disk_init();
  218. +    rc = disk_mount_all();
  219. +    if (rc<=0)
  220.      {
  221. +        lcd_puts(0, line++, "No partition found");
  222. +        lcd_update();
  223.      }
  224. -    for(i = 0; i < (0xfffff); i++)
  225. +
  226. +    pinfo = disk_partinfo(0);
  227. +    snprintf(buf, sizeof(buf), "Partition 0: 0x%02x %ld MB",
  228. +                  pinfo->type, pinfo->size / 2048);
  229. +    lcd_puts(0, line++, buf);
  230. +    lcd_update();
  231. +
  232. +    i=button_read_device();
  233. +    if(i==BUTTON_LEFT)
  234.      {
  235. +        lcd_puts(0, line, "Loading Sandisk firmware...");
  236. +        lcd_update();
  237. +        rc=load_sandisk(loadbuffer);
  238. +        /* Sandisk firmware doesn't like having the cache enabled */
  239. +    } else {
  240. +        lcd_puts(0, line, "Loading Rockbox...");
  241. +        lcd_update();
  242. +        rc=load_rockbox(loadbuffer);
  243.      }
  244. -    for(i = 0; i < (0xfffff); i++)
  245. -    {
  246. +
  247. +    if (rc < 0) {
  248. +            snprintf(buf, sizeof(buf), "Rockbox error: %d",rc);
  249. +            lcd_puts(0, line++, buf);
  250. +            lcd_update();
  251. +            while(1) {}
  252.      }
  253. -}
  254.  
  255. -static inline unsigned long get_pc(void)
  256. -{
  257. -    unsigned long pc;
  258. -    asm volatile (
  259. -        "mov %0, pc\n"
  260. -        : "=r"(pc)
  261. -    );
  262. -    return pc;
  263. +    memcpy((void*)DRAM_START,loadbuffer,rc);
  264. +    return (void*)DRAM_START;
  265.  }
  266.  
  267.  /* These functions are present in the firmware library, but we reimplement
  268. @@ -100,62 +242,7 @@
  269.  
  270.  int dbg_ports(void)
  271.  {
  272. -    unsigned int gpio_a, gpio_b, gpio_c, gpio_d;
  273. -    unsigned int gpio_e, gpio_f, gpio_g, gpio_h;
  274. -    unsigned int gpio_i, gpio_j, gpio_k, gpio_l;
  275. -
  276. -    char buf[128];
  277. -    int line;
  278. -
  279. -    lcd_setmargins(0, 0);
  280. -    lcd_clear_display();
  281. -    lcd_setfont(FONT_SYSFIXED);
  282. -
  283. -    while(1)
  284. -    {
  285. -        gpio_a = GPIOA_INPUT_VAL;
  286. -        gpio_b = GPIOB_INPUT_VAL;
  287. -        gpio_c = GPIOC_INPUT_VAL;
  288. -
  289. -        gpio_g = GPIOG_INPUT_VAL;
  290. -        gpio_h = GPIOH_INPUT_VAL;
  291. -        gpio_i = GPIOI_INPUT_VAL;
  292. -
  293. -        line = 0;
  294. -        snprintf(buf, sizeof(buf), "GPIO_A: %02x GPIO_G: %02x", gpio_a, gpio_g);
  295. -        lcd_puts(0, line++, buf);
  296. -        snprintf(buf, sizeof(buf), "GPIO_B: %02x GPIO_H: %02x", gpio_b, gpio_h);
  297. -        lcd_puts(0, line++, buf);
  298. -        snprintf(buf, sizeof(buf), "GPIO_C: %02x GPIO_I: %02x", gpio_c, gpio_i);
  299. -        lcd_puts(0, line++, buf);
  300. -        line++;
  301. -
  302. -        gpio_d = GPIOD_INPUT_VAL;
  303. -        gpio_e = GPIOE_INPUT_VAL;
  304. -        gpio_f = GPIOF_INPUT_VAL;
  305. -
  306. -        gpio_j = GPIOJ_INPUT_VAL;
  307. -        gpio_k = GPIOK_INPUT_VAL;
  308. -        gpio_l = GPIOL_INPUT_VAL;
  309. -
  310. -        snprintf(buf, sizeof(buf), "GPIO_D: %02x GPIO_J: %02x", gpio_d, gpio_j);
  311. -        lcd_puts(0, line++, buf);
  312. -        snprintf(buf, sizeof(buf), "GPIO_E: %02x GPIO_K: %02x", gpio_e, gpio_k);
  313. -        lcd_puts(0, line++, buf);
  314. -        snprintf(buf, sizeof(buf), "GPIO_F: %02x GPIO_L: %02x", gpio_f, gpio_l);
  315. -        lcd_puts(0, line++, buf);
  316. -        line++;
  317. -        snprintf(buf, sizeof(buf), "ADC_1: %02x", adc_read(ADC_0));
  318. -        lcd_puts(0, line++, buf);
  319. -        snprintf(buf, sizeof(buf), "ADC_2: %02x", adc_read(ADC_1));
  320. -        lcd_puts(0, line++, buf);
  321. -        snprintf(buf, sizeof(buf), "ADC_3: %02x", adc_read(ADC_2));
  322. -        lcd_puts(0, line++, buf);
  323. -        snprintf(buf, sizeof(buf), "ADC_4: %02x", adc_read(ADC_3));
  324. -        lcd_puts(0, line++, buf);
  325. -        lcd_update();
  326. -    }
  327. -    return 0;
  328. +   return 0;
  329.  }
  330.  
  331.  void mpeg_stop(void)
  332. @@ -173,18 +260,3 @@
  333.  void sys_poweroff(void)
  334.  {
  335.  }
  336. -
  337. -void system_reboot(void)
  338. -{
  339. -
  340. -}
  341. -
  342. -void main(void)
  343. -{
  344. -    kernel_init();
  345. -    adc_init();
  346. -    lcd_init_device();
  347. -
  348. -    dbg_ports();
  349. -}
  350. -
  351. Index: firmware/SOURCES
  352. ===================================================================
  353. RCS file: /cvsroot/rockbox/firmware/SOURCES,v
  354. retrieving revision 1.146
  355. diff -u -r1.146 SOURCES
  356. --- firmware/SOURCES    9 Dec 2006 19:18:16 -0000   1.146
  357. +++ firmware/SOURCES    10 Dec 2006 17:04:12 -0000
  358. @@ -262,7 +262,11 @@
  359.  /* no i2c driver yet */
  360.  #endif
  361.  #if defined(CPU_PP)
  362. +#ifdef BOOTLOADER
  363. +target/arm/crt0-pp-bl.S
  364. +#else
  365.  target/arm/crt0-pp.S
  366. +#endif
  367.  #elif defined(CPU_ARM)
  368.  target/arm/crt0.S
  369.  #endif /* defined(CPU_*) */
  370. Index: firmware/boot.lds
  371. ===================================================================
  372. RCS file: /cvsroot/rockbox/firmware/boot.lds,v
  373. retrieving revision 1.26
  374. diff -u -r1.26 boot.lds
  375. --- firmware/boot.lds   10 Dec 2006 13:33:12 -0000 1.26
  376. +++ firmware/boot.lds   10 Dec 2006 17:04:12 -0000
  377. @@ -8,7 +8,7 @@
  378.  OUTPUT_FORMAT(elf32-littlearm)
  379.  OUTPUT_ARCH(arm)
  380.  #ifdef CPU_PP
  381. -INPUT(target/arm/crt0-pp.o)
  382. +INPUT(target/arm/crt0-pp-bl.o)
  383.  #else
  384.  INPUT(target/arm/crt0.o)
  385.  #endif
  386. Index: firmware/export/config-e200.h
  387. ===================================================================
  388. RCS file: /cvsroot/rockbox/firmware/export/config-e200.h,v
  389. retrieving revision 1.4
  390. diff -u -r1.4 config-e200.h
  391. --- firmware/export/config-e200.h       22 Nov 2006 00:49:15 -0000     1.4
  392. +++ firmware/export/config-e200.h       10 Dec 2006 17:04:12 -0000
  393. @@ -4,7 +4,7 @@
  394.  #define TARGET_TREE /* this target is using the target tree system */
  395.  
  396.  /* For Rolo and boot loader */
  397. -#define MODEL_NUMBER 12
  398. +#define MODEL_NUMBER 16
  399.  
  400.  /* define this if you have recording possibility */
  401.  /*#define HAVE_RECORDING 1*/ /* TODO: add support for this */
  402. Index: firmware/target/arm/crt0-pp-bl.S
  403. ===================================================================
  404. RCS file: firmware/target/arm/crt0-pp-bl.S
  405. diff -N firmware/target/arm/crt0-pp-bl.S
  406. --- /dev/null   1 Jan 1970 00:00:00 -0000
  407. +++ firmware/target/arm/crt0-pp-bl.S    10 Dec 2006 17:04:13 -0000
  408. @@ -0,0 +1,174 @@
  409. +/***************************************************************************
  410. + *             __________               __   ___.
  411. + *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
  412. + *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
  413. + *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
  414. + *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
  415. + *                     \/            \/     \/    \/            \/
  416. + * $Id: crt0-pp.S,v 1.2 2006/11/22 00:49:16 dan_a Exp $
  417. + *
  418. + * Copyright (C) 2002 by Linus Nielsen Feltzing
  419. + *
  420. + * All files in this archive are subject to the GNU General Public License.
  421. + * See the file COPYING in the source tree root for full license agreement.
  422. + *
  423. + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  424. + * KIND, either express or implied.
  425. + *
  426. + ****************************************************************************/
  427. +#include "config.h"
  428. +#include "cpu.h"
  429. +
  430. +    .section .init.text,"ax",%progbits
  431. +
  432. +    .global    start
  433. +start:
  434. +
  435. +/* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux
  436. + * loader
  437. + *
  438. + * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
  439. + * Copyright (c) 2005, Bernard Leach <[email protected]>
  440. + *
  441. + */
  442. +#if CONFIG_CPU == PP5002
  443. +    .equ    PROC_ID,  0xc4000000
  444. +    .equ    COP_CTRL, 0xcf004058
  445. +    .equ    COP_STATUS, 0xcf004050
  446. +    .equ    IIS_CONFIG, 0xc0002500
  447. +    .equ    SLEEP,    0xca
  448. +    .equ    WAKE,     0xce
  449. +    .equ    SLEEPING, 0x4000
  450. +#else
  451. +    .equ    PROC_ID,  0x60000000
  452. +    .equ    COP_CTRL, 0x60007004
  453. +    .equ    COP_STATUS, 0x60007004
  454. +    .equ    IIS_CONFIG, 0x70002800
  455. +    .equ    SLEEP,    0x80000000
  456. +    .equ    WAKE,     0x0
  457. +    .equ    SLEEPING, 0x80000000
  458. +    .equ    CACHE_CTRL, 0x6000c000
  459. +#endif
  460. +
  461. +    msr    cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
  462. +
  463. +#ifndef IPOD_ARCH
  464. +    /* For builds on targets with mi4 firmware, scramble writes data to
  465. +       0xe0-0xeb, so jump past that.*/
  466. +    b      pad_skip
  467. +
  468. +.space 60*4
  469. +
  470. +pad_skip:
  471. +#endif
  472. +
  473. +/* 1 - Copy the bootloader to IRAM */
  474. +    /* get the high part of our execute address */
  475. +    ldr    r7, =0xfffffe00
  476. +    and    r4, pc, r7
  477. +
  478. +    /* Copy bootloader to safe area - 0x40000000 */
  479. +    mov    r5, #0x40000000
  480. +    ldr    r6, = _dataend
  481. +1:
  482. +    cmp    r5, r6
  483. +    ldrcc  r2, [r4], #4
  484. +    strcc  r2, [r5], #4
  485. +    bcc    1b
  486. +
  487. +/* 2 - Jump both CPU and COP there */
  488. +    ldr    pc, =start_loc    /* jump to the relocated start_loc:  */
  489. +
  490. +start_loc:
  491. +
  492. +    /* Find out which processor we are */
  493. +    ldr    r0, =PROC_ID
  494. +    ldr    r0, [r0]
  495. +    and    r0, r0, #0xff
  496. +    cmp    r0, #0x55
  497. +    beq    cpu
  498. +   
  499. +    /* put us (co-processor) to sleep */
  500. +    ldr    r4, =COP_CTRL
  501. +    mov    r3, #SLEEP
  502. +    str    r3, [r4]
  503. +    ldr    pc, =cop_wake_start
  504. +
  505. +cop_wake_start:
  506. +    /* COP: Invalidate cache */
  507. +    ldr    r0, =0xf000f044
  508. +    ldr    r1, [r0]
  509. +    orr    r1, r1, #0x6
  510. +    str    r1, [r0]
  511. +
  512. +    ldr    r0, =0x6000c000
  513. +1:
  514. +    ldr    r1, [r0]
  515. +    tst    r1, #0x8000
  516. +    bne    1b
  517. +   
  518. +    ldr    r0, =startup_loc
  519. +    ldr    pc, [r0]
  520. +
  521. +cpu:
  522. +    /* Wait for COP to be sleeping */
  523. +    ldr    r4, =COP_STATUS
  524. +1:
  525. +    ldr    r3, [r4]
  526. +    ands   r3, r3, #SLEEPING
  527. +    beq    1b
  528. +   
  529. +    /* Initialise bss section to zero */
  530. +    ldr    r2, =_edata
  531. +    ldr    r3, =_end
  532. +    mov    r4, #0
  533. +1:
  534. +    cmp    r3, r2
  535. +    strhi  r4, [r2], #4
  536. +    bhi    1b
  537. +       
  538. +    /* Set up some stack and munge it with 0xdeadbeef */
  539. +    ldr    sp, =stackend
  540. +    mov    r3, sp
  541. +    ldr    r2, =stackbegin
  542. +    ldr    r4, =0xdeadbeef
  543. +1:
  544. +    cmp    r3, r2
  545. +    strhi  r4, [r2], #4
  546. +    bhi    1b
  547. +
  548. +    /* execute the loader - this will load an image to 0x10000000 */
  549. +    bl     main
  550. +
  551. +    ldr    r1, =startup_loc
  552. +    str    r0, [r1]
  553. +
  554. +    /* Flush cache */
  555. +    ldr    r3, =0xf000f044
  556. +    ldr    r4, [r3]
  557. +    orr    r4, r4, #0x2
  558. +    str    r4, [r3]
  559. +
  560. +    ldr    r3, =0x6000c000
  561. +1:
  562. +    ldr    r4, [r3]
  563. +    tst    r4, #0x8000
  564. +    bne    1b
  565. +
  566. +    /* Wake up the coprocessor before executing the firmware */
  567. +    ldr    r4, =COP_CTRL
  568. +    mov    r3, #WAKE
  569. +    str    r3, [r4]
  570. +
  571. +    mov    pc, r0
  572. +
  573. +startup_loc:
  574. +    .word    0x0
  575. +   
  576. +#ifdef IPOD_ARCH
  577. +.align 8    /* starts at 0x100 */
  578. +.global boot_table
  579. +boot_table:
  580. +    /* here comes the boot table, don't move its offset */
  581. +    .space 400
  582. +#endif
  583. Index: firmware/target/arm/crt0-pp.S
  584. ===================================================================
  585. RCS file: /cvsroot/rockbox/firmware/target/arm/crt0-pp.S,v
  586. retrieving revision 1.2
  587. diff -u -r1.2 crt0-pp.S
  588. --- firmware/target/arm/crt0-pp.S       22 Nov 2006 00:49:16 -0000     1.2
  589. +++ firmware/target/arm/crt0-pp.S       10 Dec 2006 17:04:13 -0000
  590. @@ -52,15 +52,9 @@
  591.  
  592.      msr    cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
  593.  
  594. -#ifndef BOOTLOADER
  595.      b      pad_skip
  596.  
  597. -#if defined(SANSA_E200)
  598. -/* mi4tool writes junk between 0xe0 and 0xeb.  Avoid this. */
  599. -.space 60*4 /* (more than enough) space for exception vectors */
  600. -#else
  601. -.space 50*4
  602. -#endif
  603. +.space 50*4 /* (more than enough) space for exception vectors */
  604.  
  605.  pad_skip:
  606.  #ifdef SANSA_E200
  607. @@ -161,7 +155,6 @@
  608.      strhi  r5, [r3], #4
  609.      bhi    1b
  610.  #endif /* !STUB */
  611. -#endif /* !BOOTLOADER */
  612.  
  613.      /* Initialise bss section to zero */
  614.      ldr    r2, =_edata
  615. @@ -181,90 +174,6 @@
  616.      cmp    r3, r2
  617.      strhi  r4, [r2], #4
  618.      bhi    1b
  619. -
  620. -#ifdef BOOTLOADER
  621. -    /* TODO: the high part of the address is probably dependent on CONFIG_CPU.
  622. -       Since we tend to use ifdefs for each chipset target
  623. -       anyway, we might as well just hardcode it here.
  624. -     */
  625. -       
  626. -    /* get the high part of our execute address */
  627. -    ldr    r0, =0xff000000
  628. -    and    r8, pc, r0             @ r8 is used later
  629. -
  630. -    /* Find out which processor we are */
  631. -    mov    r0, #PROC_ID
  632. -    ldr    r0, [r0]
  633. -    and    r0, r0, #0xff
  634. -    cmp    r0, #0x55
  635. -    beq    1f
  636. -
  637. -    /* put us (co-processor) to sleep */
  638. -    ldr    r4, =COP_CTRL
  639. -    mov    r3, #SLEEP
  640. -    str    r3, [r4]
  641. -    ldr    pc, =cop_wake_start
  642. -
  643. -cop_wake_start:
  644. -    /* jump the COP to startup */
  645. -    ldr    r0, =startup_loc
  646. -    ldr    pc, [r0]
  647. -
  648. -1:
  649. -   
  650. -    /* get the high part of our execute address */
  651. -    ldr    r2, =0xffffff00
  652. -    and    r4, pc, r2
  653. -
  654. -    /* Copy bootloader to safe area - 0x40000000 */
  655. -    mov    r5, #0x40000000
  656. -    ldr    r6, = _dataend
  657. -    sub    r0, r6, r5       /* length of loader */
  658. -    add    r0, r4, r0     /* r0 points to start of loader */
  659. -1:
  660. -    cmp    r5, r6
  661. -    ldrcc  r2, [r4], #4
  662. -    strcc  r2, [r5], #4
  663. -    bcc    1b
  664. -
  665. -    ldr    pc, =start_loc    /* jump to the relocated start_loc:  */
  666. -   
  667. -start_loc:
  668. -
  669. -    /* execute the loader - this will load an image to 0x10000000 */
  670. -    bl     main
  671. -
  672. -    /* Wake up the coprocessor before executing the firmware */
  673. -
  674. -    /* save the startup address for the COP */
  675. -    ldr    r1, =startup_loc
  676. -    str    r0, [r1]
  677. -
  678. -    /* make sure COP is sleeping */
  679. -    ldr    r4, =COP_STATUS
  680. -1:
  681. -    ldr    r3, [r4]
  682. -    ands   r3, r3, #SLEEPING
  683. -    beq    1b
  684. -
  685. -    /* wake up COP */
  686. -    ldr    r4, =COP_CTRL
  687. -    mov    r3, #WAKE
  688. -    str    r3, [r4]
  689. -
  690. -    /* jump to start location */
  691. -    mov    pc, r0
  692. -
  693. -startup_loc:
  694. -    .word    0x0
  695. -
  696. -.align 8    /* starts at 0x100 */
  697. -.global boot_table
  698. -boot_table:
  699. -    /* here comes the boot table, don't move its offset */
  700. -    .space 400
  701. -
  702. -#else /* BOOTLOADER */
  703.      
  704.      /* Set up stack for IRQ mode */
  705.      msr    cpsr_c, #0xd2
  706. @@ -385,5 +294,3 @@
  707.  /* 256 words of FIQ stack */
  708.      .space 256*4
  709.  fiq_stack:
  710. -
  711. -#endif /* BOOTLOADER */
  712. Index: tools/configure
  713. ===================================================================
  714. RCS file: /cvsroot/rockbox/tools/configure,v
  715. retrieving revision 1.245
  716. diff -u -r1.245 configure
  717. --- tools/configure     27 Nov 2006 02:15:39 -0000   1.245
  718. +++ tools/configure     10 Dec 2006 17:04:17 -0000
  719. @@ -1115,10 +1115,10 @@
  720.      target="-DSANSA_E200"
  721.      memory=32 # supposedly
  722.      arm7tdmicc
  723. -    tool="$rootdir/tools/scramble -mi4v3"
  724. +    tool="$rootdir/tools/scramble -add=e200"
  725.      bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
  726.      bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
  727. -    output="PP5022.mi4"
  728. +    output="rockbox.e200"
  729.      appextra="recorder:gui"
  730.      archosrom=""
  731.      flash=""
  732. Index: tools/scramble.c
  733. ===================================================================
  734. RCS file: /cvsroot/rockbox/tools/scramble.c,v
  735. retrieving revision 1.35
  736. diff -u -r1.35 scramble.c
  737. --- tools/scramble.c    31 Aug 2006 19:19:35 -0000  1.35
  738. +++ tools/scramble.c    10 Dec 2006 17:04:18 -0000
  739. @@ -89,7 +89,7 @@
  740.             "\t-mi4v3  PortalPlayer .mi4 format (revision 010301)\n"
  741.             "\t-add=X  Rockbox generic \"add-up\" checksum format\n"
  742.             "\t        (X values: h100, h120, h140, h300, ipco, nano, ipvd\n"
  743. -           "\t                   ip3g, ip4g, mini, x5, h10, h10_5gb)\n"
  744. +           "\t                   ip3g, ip4g, mini, x5, h10, h10_5gb, tpj2, e200)\n"
  745.             "\nNo option results in Archos standard player/recorder format.\n");
  746.  
  747.      exit(1);
  748. @@ -207,6 +207,8 @@
  749.              modelnum = 14;
  750.          else if(!strcmp(&argv[1][5], "tpj2"))
  751.              modelnum = 15;
  752. +        else if(!strcmp(&argv[1][5], "e200"))
  753. +            modelnum = 16;
  754.          else {
  755.              fprintf(stderr, "unsupported model: %s\n", &argv[1][5]);
  756.              return 2;

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