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- Unnamed
- Sunday, June 17th, 2012 at 4:38:48pm MDT
- LIST P=12F683, R=DEC
- INCLUDE <P12F683.INC>
- __CONFIG _CPD_OFF&_CP_OFF&_PWRTE_ON&_BOREN_OFF&_MCLRE_ON&_HS_OSC&_WDT_OFF&_FCMEN_OFF
- #DEFINE TMP0 0x20
- #DEFINE TMP1 0x21
- #DEFINE POSX 0x22
- #DEFINE POSY 0x23
- ORG 0
- GOTO START
- ORG 4
- BTFSC PIR1, TMR2IF
- CALL TIMER
- RETFIE
- TIMER
- BCF PIR1, TMR2IF
- RESINX
- MOVF POSX, W
- CALL SIN1336
- ANDLW 0xFF ; just for flag
- BTFSC STATUS, Z
- GOTO ENDSINX
- MOVWF TMP1
- RESINY
- MOVF POSY, W
- CALL SIN941
- ANDLW 0xFF ; just for flag
- BTFSC STATUS, Z
- GOTO ENDSINY
- CLRF TMP0
- ADDWF TMP1, F
- BTFSC STATUS, C ; store carry to TMP0
- BSF TMP0, 7
- ; put low bit in the right place
- BCF CCP1CON, 5
- BTFSC TMP1, 0
- BSF CCP1CON, 5
- RRF TMP1, W
- ANDLW 0x7F
- IORWF TMP0, W
- MOVWF CCPR1L
- INCF POSX, F
- INCF POSY, F
- RETFIE
- ENDSINX
- CLRF POSX
- GOTO RESINX
- ENDSINY
- CLRF POSY
- GOTO RESINY
- TONEEND
- BCF T2CON, TMR2ON
- BSF TRISIO, 2
- RETFIE
- START
- ; (PR2 + 1) * 4 * TOSC * TMR2_PRESCALE = period
- ; duty cycle bits 0 and 1 are bits 4 and 5 of CCP1CON
- ; CCPR1L holds the 8 most significant bits
- BSF STATUS, RP0
- ; BSF OSCCON, 4 ; Set up internal oscillator for 8MHz
- BSF TRISIO, 2 ; Disable output driver for GP2
- BSF PIE1, TMR2IE
- BCF STATUS, RP0
- MOVLW 0x0C ; enable PWM mode
- MOVWF CCP1CON
- BSF INTCON, PEIE
- BSF INTCON, GIE
- CALL DOTONE
- ; loop forever
- INFLOOP
- GOTO INFLOOP
- DOTONE
- BSF STATUS, RP0
- BCF TRISIO, 2
- BCF STATUS, RP0
- CLRF POSX
- CLRF POSY
- BSF T2CON, TMR2ON
- WAITTONE
- BTFSC T2CON, TMR2ON
- GOTO WAITTONE
- RETURN
- ; 19531.25 samples per second
- SIN697
- ADDWF PCL, F
- RETLW 128
- RETLW 156
- RETLW 183
- RETLW 207
- RETLW 228
- RETLW 243
- RETLW 252
- RETLW 255
- RETLW 252
- RETLW 243
- RETLW 228
- RETLW 208
- RETLW 183
- RETLW 156
- RETLW 128
- RETLW 100
- RETLW 73
- RETLW 49
- RETLW 29
- RETLW 13
- RETLW 4
- RETLW 1
- RETLW 4
- RETLW 13
- RETLW 28
- RETLW 48
- RETLW 72
- RETLW 99
- RETLW 128
- RETLW 0
- SIN770
- ADDWF PCL, F
- RETLW 128
- RETLW 159
- RETLW 188
- RETLW 214
- RETLW 235
- RETLW 248
- RETLW 255
- RETLW 254
- RETLW 245
- RETLW 229
- RETLW 206
- RETLW 179
- RETLW 149
- RETLW 118
- RETLW 88
- RETLW 59
- RETLW 35
- RETLW 16
- RETLW 5
- RETLW 1
- RETLW 4
- RETLW 15
- RETLW 34
- RETLW 58
- RETLW 86
- RETLW 117
- RETLW 0
- SIN852
- ADDWF PCL, F
- RETLW 221
- RETLW 241
- RETLW 253
- RETLW 255
- RETLW 248
- RETLW 232
- RETLW 207
- RETLW 177
- RETLW 144
- RETLW 110
- RETLW 76
- RETLW 47
- RETLW 23
- RETLW 7
- RETLW 1
- RETLW 4
- RETLW 16
- RETLW 36
- RETLW 64
- RETLW 96
- RETLW 0
- SIN941
- ADDWF PCL, F
- RETLW 166
- RETLW 200
- RETLW 228
- RETLW 247
- RETLW 255
- RETLW 252
- RETLW 237
- RETLW 212
- RETLW 179
- RETLW 142
- RETLW 105
- RETLW 68
- RETLW 37
- RETLW 15
- RETLW 2
- RETLW 2
- RETLW 12
- RETLW 34
- RETLW 64
- RETLW 99
- RETLW 0
- SIN1209
- ADDWF PCL, F
- RETLW 128
- RETLW 176
- RETLW 217
- RETLW 245
- RETLW 255
- RETLW 247
- RETLW 220
- RETLW 180
- RETLW 131
- RETLW 84
- RETLW 41
- RETLW 12
- RETLW 1
- RETLW 8
- RETLW 33
- RETLW 73
- RETLW 121
- RETLW 0
- SIN1336
- ADDWF PCL, F
- RETLW 128
- RETLW 181
- RETLW 224
- RETLW 250
- RETLW 254
- RETLW 235
- RETLW 196
- RETLW 145
- RETLW 91
- RETLW 44
- RETLW 11
- RETLW 1
- RETLW 13
- RETLW 46
- RETLW 95
- RETLW 0
- SIN1477
- ADDWF PCL, F
- RETLW 128
- RETLW 186
- RETLW 232
- RETLW 254
- RETLW 249
- RETLW 216
- RETLW 164
- RETLW 105
- RETLW 50
- RETLW 13
- RETLW 1
- RETLW 17
- RETLW 58
- RETLW 115
- RETLW 0
- #IF 0
- SIN
- ; destroys TMP0
- ; 14 cycles including call
- MOVWF TMP0, F
- ANDLW 0x7F
- CALL SINTAB ; 9
- BTFSC TMP0, 7
- SUBLW 127
- BTFSS TMP0, 7
- ADDLW 128
- RETURN
- SINTAB ; 5 cycles including call
- ADDWF PCL, F
- RETLW 0
- RETLW 3
- RETLW 6
- RETLW 9
- RETLW 12
- RETLW 15
- RETLW 18
- RETLW 21
- RETLW 24
- RETLW 28
- RETLW 31
- RETLW 34
- RETLW 37
- RETLW 40
- RETLW 43
- RETLW 46
- RETLW 48
- RETLW 51
- RETLW 54
- RETLW 57
- RETLW 60
- RETLW 63
- RETLW 65
- RETLW 68
- RETLW 71
- RETLW 73
- RETLW 76
- RETLW 78
- RETLW 81
- RETLW 83
- RETLW 85
- RETLW 88
- RETLW 90
- RETLW 92
- RETLW 94
- RETLW 96
- RETLW 98
- RETLW 100
- RETLW 102
- RETLW 104
- RETLW 106
- RETLW 108
- RETLW 109
- RETLW 111
- RETLW 112
- RETLW 114
- RETLW 115
- RETLW 117
- RETLW 118
- RETLW 119
- RETLW 120
- RETLW 121
- RETLW 122
- RETLW 123
- RETLW 124
- RETLW 124
- RETLW 125
- RETLW 126
- RETLW 126
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 127
- RETLW 126
- RETLW 126
- RETLW 125
- RETLW 124
- RETLW 124
- RETLW 123
- RETLW 122
- RETLW 121
- RETLW 120
- RETLW 119
- RETLW 118
- RETLW 117
- RETLW 115
- RETLW 114
- RETLW 112
- RETLW 111
- RETLW 109
- RETLW 108
- RETLW 106
- RETLW 104
- RETLW 102
- RETLW 100
- RETLW 98
- RETLW 96
- RETLW 94
- RETLW 92
- RETLW 90
- RETLW 88
- RETLW 85
- RETLW 83
- RETLW 81
- RETLW 78
- RETLW 76
- RETLW 73
- RETLW 71
- RETLW 68
- RETLW 65
- RETLW 63
- RETLW 60
- RETLW 57
- RETLW 54
- RETLW 51
- RETLW 49
- RETLW 46
- RETLW 43
- RETLW 40
- RETLW 37
- RETLW 34
- RETLW 31
- RETLW 28
- RETLW 25
- RETLW 21
- RETLW 18
- RETLW 15
- RETLW 12
- RETLW 9
- RETLW 6
- RETLW 3
- #ENDIF
- END
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